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TC59LM914AMG Datasheet, PDF (3/59 Pages) Toshiba Semiconductor – MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC
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TC59LM914AMG
PIN NAMES
PIN
NAME
A0~A13
Address Input
BA0~BA2 Bank Address
DQ0~DQ15 Data Input / Output
CS
Chip Select
FN
Function Control
PD
Power Down Control
CLK, CLK Clock Input
4 bank operation can be performed using BA2 as A14.
PIN ASSIGNMENT (TOP VIEW)
ball pitch=1.0 x 1.0mm
x 16
12
TC59LM914/06AMG-37,-50
PIN
NAME
UDQS/LDQS Write/Read Data Strobe
VDD
Power (+2.5 V)
VSS
VDDQ
Gorund
Power (+1.5 V / +1.8 V)
(for I/O buffer)
VSSQ
Power
(for I/O buffer)
VREF
NC
Reference Voltage
Not Conneted
3456
A
Index VSS DQ15
B
DQ14 VSSQ
C
DQ13 VDDQ
D
DQ12 DQ11
E
DQ10 VSSQ
F
NC
DQ9 VDDQ
G
DQ8 VSSQ
H
NC UDQS
J
VREF VSS
K
NC
CLK CLK
L
A12 PD
M
A11 A9
N
A8
A7
P
A5
A6
R
VSS
A4
DQ0 VDD
VDDQ DQ1
VSSQ DQ2
DQ4 DQ3
VDDQ DQ5
VSSQ DQ6
NC
VDDQ DQ7
LDQS NC
VDD BA2
FN A13
NC
CS NC
BA1 BA0
A0 A10
A2
A1
A3 VDD
: Depopulated ball
Rev 1.0
2004-08-20 3/59
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