TC59LM914AMG Datasheet, PDF (29/59 Pages) Toshiba Semiconductor – MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC

SINGLE BANK READ-WRITE TIMING (CL = 3)
TC59LM914/06AMG-37,-50
CLK
CLK
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
I_RC = 5 cycles
I_RC = 5 cycles
I_RC = 5 cycles
Command RDA LAL
DESL
WRA LAL
DESL
RDA LAL
DESL
WRA
Address UA LA
UA LA
UA LA
UA
Bank Add. #0
BL = 2
Hi-Z
DQS
Hi-Z
DQS
DQ
Hi-Z
BL = 4
Hi-Z
DQS
Hi-Z
DQS
Hi-Z
DQ
CL = 3
CL = 3
#0
#0
Q0 Q1
WL = 2
D0 D1
WL = 2
Q0 Q1 Q2 Q3
D0 D1 D2 D3
Note : TC59LM914AMG doesn’t have DQS .
#0
CL = 3
Q0 Q1
CL = 3
Q0 Q1 Q2
Rev 1.0
2004-08-20 29/59