TA1370FG Datasheet, PDF (27/42 Pages) Toshiba Semiconductor – SYNC Processor, Frequency Counter IC for TV Component Signals

Note
Item
HA04 Sync1 input threshold amplitude
Sync2 input threshold amplitude
HA05 HD3 input threshold amplitude
(synchronization block)
TA1370FG
SW Mode
S07 S23 S24 S26
Test Conditions and Measuring Method (V_CC = 9 V, Ta = 25 ± 3°C, unless otherwise specified)
c
b
a
b (1) Set sub-address (00) 0B and (02) 00.
↓
↓ (2) Input Signal a (33.75 kHz) to pin 26 (SYNC1-IN)
b
a (3) Measure the sync. tip DC voltage of signal a on pin 26 (SYNC1-IN). (V_sync11)
(4) Supply external voltage via 100 kΩ to pin 26 and increase the voltage.
(5) Measure the sync. tip DC voltage (V_sync12) when HD-OUT desynchronizes with signal a calculate V_thS10.
V_thS10 = V_sync12 − V_sync11
(6) Set sub-address (00) B1, B2 and B3 and calculate V_thS11, V_thS12 and V_thS13 as well.
(7) Calculate V_thS20, V_thS21, V_thS22 and V_thS23 against pin 24 (SYNC2-IN) in the same way as 4 to 6.
Signal a
29.63 µs
0.593 µs
0.285 V
c
b

 (1) Set sub-address (03) 47 and (02) 02.
(2) Input Signal b (31.5 kHz) to pin 14 (HD3-IN).
(3) Increasing the voltage of Signal b from 0 V, measure the voltage of Signal b V_thHD3 when HD1-OUT lock.
Signal b
31.75 µs
2.35 µs
V_thHD1
27
2003-02-19