TC9444F Datasheet, PDF (20/28 Pages) Toshiba Semiconductor – Single-Chip karaoke IC II

TC9444F
3.18
MODE Command
Command to set the IC operating mode by adding one-byte data.
This command bundles parameters so that they need be set once only at power-on.
The CL bits are also used to make settings.
Table 3.23 MODE Command
CH
CL
D0
3
2
1
0
7
6
5
4
3
2
1
0
D
0
SYMM2 SYMM1 RLS OBIT2 OBIT1 IBIT3 IBIT2 IBIT1 MCKINH DZINH ADPD
Note 15: At a reset, the initial values are SYNM2 = SYNM1 = 0, RLS = 1, D0 = 00H.
(master mode, 16-bit input/output)
SYNM1, 2: Select sync mode
RLS: Selects the channel clock polarity (when RLS = “H” and LRCK = “L” or when RLS = “L” and LRCK =
“H”, L-channel data selected).
OBIT1, 2: Select the digital audio output format.
IBIT1, 2, 3: Select the digital audio input format.
MCKINH: When “H”, disables the MCKO pin output (MCK pin is fixed to low).
DZINH: When “H”, disables the digital zero detection output (DZ pin is fixed to low).
ADPD: When “H”, the AD converter power save and output are masked by setting them to digital zeros.
The MCKINH bit is used to halt the XI input clock (or the halved input clock) output from the
MCKO pin. The MCKO pin uses a large output buffer for high-speed clock output. However, to
suppress unnecessary output without using this pin, set MCKINH to High.
A function is supported to forcibly mute the DAC output by checking whether digital data input
from the SDI pin are all zeroes and by setting the DZ pin high if all-zero input continues for a
specified detection time (Table 2.4).
When digital input and analog input are switched, digital input zero detection becomes active,
setting the DZ pin to High. The DZINH bit is used to inhibit the DZ pin from going High.
Setting the ADPD bit to High halts the AD converter internal circuits and masks the AD converter
output by setting to digital zeros. As some circuitry is halted at this time, the power dissipation drops
slightly.
4. AD Converter
The TC9444F incorporates a successive approximation 16-bit AD converter with a two times
oversampling rate. The AD converter performs three-channel interleave processing for the line input
L/R-channels and the microphone input.
The microphone input is designed to internally generate an echo effect. The microphone main signal and
the microphone echo signal are combined outside the IC. The microphone main signal and the microphone
echo component can also be added internally using a microphone through-path in the IC.
When not using an AD converter, connect jumpers between the MICI-LPFO1, AIL-LPFO2, and
AIR-LPFO3 pins.
5. DA Converter
Incorporates a SD-type modulation 1-bit DA converter and a tertiary analog post filter.
20
2002-01-11