TA1276AFG Datasheet, PDF (20/83 Pages) Toshiba Semiconductor – PAL/NTSC Video Chroma And Deflection IC For CTV

Data Transmit Format 1
S
Slave address
7 bit
MSB
S: Start condition
0A
Sub address
8 bit
MSB
A: Acknowledge
TA1276AFG
A
Transmit data
8 bit
MSB
AP
P: Stop condition
Data Transmit Format 2
S
Slave address
0A
Sub address
A
Transmit data 1
A ------
------ A
Sub address
A
Transmit data n
AP
Data Receive Format
S
Slave address
1A
Receive data 01
A
Transmit data 02
AP
7 bit
MSB
8 bit
MSB
At the moment of the first acknowledge, the master transmitter becomes a master receiver and the slave
receiver becomes a slave transmitter. This acknowledge is still generated by the slave.
The STOP condition is generated by the master.
Optional Data Transmit Format: Automatic Increment Mode
S
Slave address
0A1
Sub address
A
Transmit data 1
------
Transmit data n
AP
7 bit
MSB
MSB
7 bit
8 bit
MSB
8 bit
MSB
In this transmission method, data is set on automatically incremented sub-address from the specified
sub-address.
Purchase of TOSHIBA I²C components conveys a license under the Phillips I²C Patent Rights to use
these components in an I²C system, provided that the system conforms to the I²C standard Specification as
defined by Phillips.
20
2002-04-01