SSM6N09FU_07 Datasheet, PDF (2/5 Pages) Toshiba Semiconductor – High Speed Switching Applications

Marking
6
5
4
DJ
Equivalent Circuit
(top view)
6
5
4
Q1
Q2
SSM6N09FU
Figure 1: 25.4 mm × 25.4 mm × 1.6 t,
Cu Pad: 0.32 mm² × 6
0.4 mm
1
2
3
1
2
3
Electrical Characteristics (Ta = 25°C) (Q1, Q2 common)
Characteristics
Gate leakage current
Drain-Source breakdown voltage
Drain cut-off current
Gate threshold voltage
Forward transfer admittance
Drain-Source ON resistance
Input capacitance
Reverse transfer capacitance
Output capacitance
Switching time
Turn-on time
Turn-off time
Note2: Pulse test
Symbol
Test Condition
Min Typ. Max Unit
I_GSS
V_GS = ±16 V, V_DS = 0
⎯
⎯
±1
μA
V _{(BR) DSS} I_D = 1 mA, V_GS = 0
30
⎯
⎯
V
I_DSS
V_DS = 30 V, V_GS = 0
⎯
⎯
1
μA
V_th
V_DS = 5 V, I_D = 0.1 mA
1.1
⎯
1.8
V
⎪Y_fs⎪
V_DS = 5 V, I_D = 200 mA (Note2) 270
⎯
⎯
mS
I_D = 200 mA, V_GS = 10 V (Note2) ⎯
0.5 0.7
R_{DS (ON)} I_D = 200 mA, V_GS = 4 V (Note2) ⎯
0.8 1.2
Ω
I_D = 200 mA, V_GS = 3.3 V (Note2) ⎯
1.0 1.7
C_iss
V_DS = 5 V, V_GS = 0, f = 1 MHz
⎯
20
⎯
pF
C_rss
V_DS = 5 V, V_GS = 0, f = 1 MHz
⎯
7
⎯
pF
C_oss
V_DS = 5 V, V_GS = 0, f = 1 MHz
⎯
16
⎯
pF
t_on
V_DD = 5 V, I_D = 200 mA,
t_off
V_GS = 0~4 V
⎯
72
⎯
ns
⎯
68
⎯
Switching Time Test Circuit (Q1, Q2 Common)
(a) Test circuit
4V
IN
0
10 μs
V_DD = 5 V
Duty ^<= 1%
V_IN: t_r, t_f < 5 ns
(Z_out = 50 Ω)
Common Source
Ta = 25°C
OUT
R_L
V_DD
(b) V_IN
4V
0V
(c) V_OUT
V_DD
V_{DS (ON)}
90%
10%
10%
90%
t_r
t_f
t_on
t_off
Precaution
V_th can be expressed as voltage between gate and source when low operating current value is I_D = 100 μA for this
product. For normal switching operation, V_{GS (on)} requires higher voltage than V_th and V_{GS (off)} requires lower
voltage than V_th. (Relationship can be established as follows: V_{GS (off)} < V_th < V_{GS (on)} )
Please take this into consideration for using the device.
2
2007-11-01