SSM3K14T_07 Datasheet, PDF (2/6 Pages) Toshiba Semiconductor – Silicon N Channel MOS Type DC-DC Converter

SSM3K14T
Electrical Characteristics (Ta = 25°C)
Characteristic
Gate leakage current
Drain-Source breakdown voltage
Drain Cut-off current
Gate threshold voltage
Forward transfer admittance
Drain-Source ON resistance
Total gate charge
Input capacitance
Reverse transfer capacitance
Output capacitance
Rise time
Switching time
Turn-on time
Fall time
Turn-off time
Note 3: Pulse test
Symbol
Test Condition
Min Typ. Max Unit
I_GSS
V_GS = ±16 V, V_DS = 0
⎯
⎯
±1
μA
V _{(BR) DSS}
V _{(BR) DSX}
I_D = 1 mA, V_GS = 0
I_D = 1 mA, V_GS = −20 V
30
⎯
⎯
V
15
⎯
⎯
I_DSS
V_DS = 30 V, V_GS = 0
⎯
⎯
1
μA
V_th
V_DS = 5 V, I_D = 0.1 mA
1.0
⎯
2.5
V
|Y_fs|
V_DS = 5 V, I_D = 2 A
(Note 3) 3.2 6.4
⎯
S
I_D = 2 A, V_GS = 10 V
(Note 3) ⎯
31
39
R_{DS (ON)} I_D = 2 A, V_GS = 4.5 V
(Note 3) ⎯
45
57
mΩ
I_D = 2 A, V_GS = 4.0 V
(Note 3) ⎯
50
67
Qg
V_DD ∼− 24 V, I_D = 4 A, V_GS = 4 V
⎯
5.0
⎯
nC
C_iss
V_DS = 15 V, V_GS = 0, f = 1 MHz
⎯ 460 ⎯
pF
C_rss
V_DS = 15 V, V_GS = 0, f = 1 MHz
⎯
62
⎯
pF
C_oss
V_DS = 15 V, V_GS = 0, f = 1 MHz
⎯ 106 ⎯
pF
t_r
⎯
15
⎯
t_on
V_DD = 15 V, I_D = 2 A
t_f
V_GS = 0~4 V, R_G = 10 Ω
⎯
24
⎯
ns
⎯
6
⎯
t_off
⎯
19
⎯
Switching Time Test Circuit
(a) Test circuit
10 μs
4V
IN
0
Precaution
I_D
V_DD = 15 V
OUT _{RG = 10 Ω}
D.U. ^<= 1%
V_IN: t_r, t_f < 5 ns
Common Source
Ta = 25°C
V_DD
4V
(b) V_IN
10%
0
V_DD
(c) V_OUT
V_{DS (ON)}
t_r
t_on
90%
10%
90%
t_f
t_off
V_th can be expressed as voltage between gate and source when low operating current value is I_D = 100 μA for
this product. For normal switching operation, V_{GS (on)} requires higher voltage than V_th and V_{GS (off)} requires
lower voltage than V_th.
(relationship can be established as follows: V_{GS (off)} < V_th < V_{GS (on)} )
Please take this into consideration for using the device.
2
2007-11-01