JBT6L77-AS Datasheet, PDF (15/20 Pages) Toshiba Semiconductor – Source Driver for TFT LCD Panels

Timing Diagrams 1
JBT6L77-AS
DI/O, DO/I
(Input)
CPH
DA0 to DA5
0
1
2
3
(*)
SA1/
SA80
SA2/
SA79
SA3/
SA78
78
79
80
SA79/
SA2
SA80/
SA1
DB0 to DB5
SB1/
SB80
SB2/
SB79
SB3/
SB78
SB79/
SB2
SB80/
SB1
DC0 to DC5
SC1/
SC80
SC2/
SC79
SC3/
SC78
SC79/
SC2
SC80/
SC1
DO/I, DI/O
(Output)
Timing Diagrams 2
(*) Upper stage: SA1 ® U/D = High
Lower stage: SA80 ® U/D = Low
01234
CPH
DI/O, DO/I
(Input)
DI/O, DO/I
(Output)
DA0 to DA5
DB0 to DB5
DC0 to DC5
LOAD
First data
SA1 to SA80
Hi-z
SB1 to SB80
SC1 to SC80
79 80 81
Last data
01234
First data at next stage
Hi-z
15
2001-12-18