THNCF008MAA Datasheet, PDF (14/52 Pages) Toshiba Semiconductor – CompactFlash Card

Preliminary version
THNCFxxxMAA Series
Task File register access specifications
There are two cases of Task File register mapping, one is mapped I/O address area, the other is mapped Memory
address area. Each case of Task File registers read and write operations is executed under the condition as
follows. That area can be accessed by Byte/World/Odd Byte modes, which are defined by PC card standard
specifications.
(1) I/O address map
Task File Register Read Access Mode (1)
Mode
Standby mode
Byte access(8-bit)
Word access(16-bit)
Odd byte access(8-bit)
Note: x: L or H
-REG
x
L
L
L
L
-CE2
H
H
H
L
L
-CE1
H
L
L
L
H
A0 -IORD -IOWR -OE
xx
x
x
LL
HH
HL
HH
xL
HH
xL
HH
-WE D8 to D15
x High-Z
H High-Z
H High-Z
H odd byte
H odd byte
D0 to D7
High-Z
even byte
odd byte
even byte
High-Z
Task File Register Write Access Mode (1)
Mode
Standby mode
Byte access(8-bit)
Word access(16-bit)
Odd byte access(8-bit)
Note: x: L or H
-REG
x
L
L
L
L
-CE2
H
H
H
L
L
-CE1
H
L
L
L
H
A0 -IORD -IOWR -OE -WE D8 to D15 D0 to D7
xx
x
x x Don’t care Don’t care
LH
L
H H Don’t care even byte
HH
L
H H Don’t care odd byte
xH
L H H odd byte even byte
xH
L
H H odd byte Don’t care
Task File Register Access Timing Example (1)
A0 to A10
-REG
-CE2/-CE1
-IORD
-IOWR
D0 to D15
Dout
read cycle
Din
write cycle
2001-09-05 14/52