THNCF008MAA Datasheet, PDF (10/52 Pages) Toshiba Semiconductor – CompactFlash Card

Preliminary version
THNCFxxxMAA Series
Signal Name
-CSEL
(PC Card Memory Mode)
-CSEL
(PC Card I/O Mode)
-CSEL
(True IDE Mode)
D15 – D00
(PC Card Memory Mode)
D15 – D00
(PC Card I/O Mode)
D15 – D00
(True IDE Mode)
GND
(PC Card Memory Mode)
GND
(PC Card I/O Mode)
GND
(True IDE Mode)
-INPACK
(PC Card Memory Mode)
-INPACK
(PC Card I/O Mode)
Input Acknowledge
-INPACK
(True IDE Mode)
-IORD
(PC Card Memory Mode)
-IORD
(PC Card I/O Mode)
-IORD
(True IDE Mode)
-IOWR
(PC Card Memory Mode)
-IOWR
(PC Card I/O Mode)
-IOWR
(True IDE Mode)
Dir.
Pin
Description
I
39
This signal is not used for this mode.
This signal is not used for this mode.
This internally pulled up signal is used to configure this device as a
Master or a Slave when configured in the True IDE Mode.
When this pin is grounded, this device is configured as a Master.
When the pin is open, this device is configured as a Slave.
I/O 31,30,29,28, These lines carry the Data, Commands and Status information between
27,49,48,47, the host and the controller. D00 is the LSB of the Even Byte of the
6,5,4,3,2,23, Word. D08 is the LSB of the Odd Byte of the Word.
22,21
This signal is the same as the PC Card Memory Mode signal.
In True IDE Mode, all Task File operations occur in byte mode on the
low order bus D00–D07 while all data transfers are 16bit using
D00–D15.
-
1, 50
Ground
This signal is the same for all modes.
This signal is the same for all modes.
O
43
This signal is not used in this mode.
The input Acknowledge signal is asserted by the CompactFlash Storage
Card or CF+ Card when the card is selected and responding to an I/O
read cycle at the address that is on the address bus. This signal is
used by the host to control the enable of any input data buffers between
the CompactFlash Storage Card or CF+Card and the CPU.
In True IDE mode this output signal is not used and should not be
connected at the host.
I
34
This signal is not used in this mode.
This is an I/O Read strobe generated by the host. This signal gates
I/O data onto the bus from the CompactFlash Storage Card or CF+Card
when the card is configured to use the I/O interface.
In True IDE Mode, this signal has the same function as in PC Card I/O
Mode.
I
35
This signal is not used in this mode.
The I/O Write strobe pulse is used to clock I/O data on the Card Data
bus into the CompactFlash Strage Card or CF+Card controller registers
when the CompactFlash Storage Card or CF+Card is configured to use
the I/O interface.
The clocking will occur on the negative to positive edge of the
signal(trailing edge).
In True IDE Mode, this signal has the same function as in PC Card I/O
Mode.
2001-09-05 10/52