TC55VZM216A Datasheet, PDF (1/11 Pages) Toshiba Semiconductor – 262,144-WORD BY 16-BIT CMOS STATIC RAM

TC55VZM216AJJN/AFTN08,10,12
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
262,144-WORD BY 16-BIT CMOS STATIC RAM
DESCRIPTION
The TC55VZM216AJJN/AFTN is a 4,194,304-bit high-speed static random access memory (SRAM) organized as
262,144 words by 16 bits. Fabricated using CMOS technology and advanced circuit techniques to provide high
speed, it operates from a single 3.3 V power supply. Chip enable ( CE ) can be used to place the device in a
low-power mode, and output enable ( OE ) provides fast memory access. Data byte control signals ( LB , UB ) provide
lower and upper byte access. This device is well suited to cache memory applications where high-speed access and
high-speed storage are required. All inputs and outputs are directly LVTTL compatible. The
TC55VZM216AJJN/AFTN is available in plastic 44-pin SOJ and TSOP with 400mil width for high density surface
assembly.
FEATURES
• Fast access time (the following are maximum values)
TC55VZM216AJJN/AFTN08:8 ns
TC55VZM216AJJN/AFTN10:10 ns
TC55VZM216AJJN/AFTN12:12 ns
• Low-power dissipation (IDDO2)
(the following are maximum values)
Cycle Time
8
10 12 ns
Operation (max) 140 130 120 mA
Standby:4 mA (both devices)
• Single power supply voltage of 3.3 V ± 0.3 V
• Fully static operation
• All inputs and outputs are LVTTL compatible
• Output buffer control using OE
• Data byte control using LB (I/O1 to I/O8) and
UB (I/O9 to I/O16)
• Package:
SOJ44-P-400-1.27 (AJJN) (Weight: 1.64 g typ)
TSOP II44-P-400-0.80 (AFTN) (Weight: 0.45 g typ)
PIN ASSIGNMENT (TOP VIEW)
44 PIN SOJ
44 PIN TSOP
A4 1
A3 2
A2 3
A1 4
A0 5
CE ⁶
I/O1 7
I/O2 8
I/O3 9
I/O4 10
VDD 11
GND 12
I/O5 13
I/O6 14
I/O7 15
I/O8 16
WE ¹⁷
A15 18
A14 19
A13 20
A12 21
A16 22
44 A5
A4 1
43 A6
A3 2
42 A7
A2 3
41 OE
A1 4
40 UB
A0 5
39 _LB
CE ⁶
38 I/O16 I/O1 7
37 I/O15 I/O2 8
36 I/O14 I/O3 9
35 I/O13 I/O4 10
34 GND VDD 11
33 VDD GND 12
32 I/O12 I/O5 13
31 I/O11 I/O6 14
30 I/O10 I/O7 15
29 I/O9 I/O8 16
28 NU
WE ¹⁷
27 A8
A15 18
26 A9
A14 19
25 A10 A13 20
24 A11 A12 21
23 A17 A16 22
44 A5
43 A6
42 A7
41 OE
40 UB
39 _LB
38 I/O16
37 I/O15
36 I/O14
35 I/O13
34 GND
33 VDD
32 I/O12
31 I/O11
30 I/O10
29 I/O9
28 NU
27 A8
26 A9
25 A10
24 A11
23 A17
(TC55VZM216AJJN)
(TC55VZM216AFTN)
PIN NAMES
A0 to A17 Address Inputs
I/O1 to I/O16 Data Inputs/Outputs
CE
Chip Enable Input
WE
Write Enable Input
OE
Output Enable Input
LB , UB Data Byte Control Inputs
V_DD
Power (+3.3 V)
GND
Ground
NU
Not Usable (Input)
2003-01-17 1/11