XC6133 Datasheet, PDF (17/28 Pages) Torex Semiconductor – Delay capacitor adjustable voltage detectors with sense pin isolation

XC6133
Series
■NOTES ON USE
1) Please use this IC within the stated maximum ratings. For temporary, transitional voltage drop or voltage rising phenomenon,
the IC isliable to malfunction should the ratings be exceeded.
2) The power input pin voltage may fall due to the flow through current during IC operation and the resistance component
between the power supply and the power input pin.
In the case of CMOS output, a drop in the power input pin voltage may occur in the same way due to the output current. When
this happens, if the power input pin voltage drops below the minimum operating voltage, a malfunction may occur.
3) Note that large, sharp changes of the power input pin voltage may lead to malfunction.
4) Power supply noise is sometimes a cause of malfunction. Sufficiently test using the actual device, such as inserting a
capacitor between VIN and GND.
5) There is a possibility that oscillation will occur if the resistances of the VSEN pin is high. Use a resistance of 1MΩ or less
between the node to monitor and VSEN pin.
6) Exercise caution if VIN and VSEN are started in common, as the output will be undefined until VIN reaches the operating
voltage.
7) For a manual reset function, in case when the function is activated by feeding either MRB H level or MRB L level to Cd/MRB
pin instead of using a reset switch, please note these phenomena below;
・The RESET output signal will be undefined when MRB H is fed to Cd/MRB pin under the detect condition.
・The RESET output signal will be undefined based on the voltage relationship between VSEN pin and Cd/MRB pin.
8) When an N-ch open drain output is used, the VRESETB voltage at detection and release is determined by the pull-up resistance
connected to the output pin. Refer to the following when selecting the resistance value.
At detection:
VRESETB=Vpull/(1+Rpull/RON)
Vpull：Voltage after pull-up
RON(*1)：ON resistance of N-ch driver M4 (calculated from VRESETB/IRBOUTN based on electrical characteristics)
Example: When VIN=2.0V^(*2), RON=0.3/4.2×10^-3=71.4Ω (MAX.).
If it is desired to make VRESETB at detection 0.1V or less when Vpull is 3.0V,
Rpull={(Vpull/VRESETB)-1}×RON={(3/0.1)-1}×71.4≒2.1kΩ
Therefore, to make the output voltage at detection 0.1V or less under the above conditions, the pull-up resistance must be 2.1kΩ or higher.
(*1) _{Note that RON becomes larger as VIN becomes smaller.}
(*2) _{For VIN in the calculation, use the lowest value of the input voltage range you will use.}
At release:
VRESETB=Vpull/(1+Rpull/Roff)
Vpull: Voltage after pull-up
Roff: Resistance when N-ch driver M4 is OFF (calculated from VRESETB/ILEAKN based on electrical characteristics)
Example:When Vpull is 6.0V, Roff=6/(0.1×10^-6)=60MΩ (MIN.). If it is desired to make VRESETB 5.99V or higher,
Rpull={(Vpull/VRESETB)-1}×Roff={(6/5.99)-1}×60×10⁶≒100kΩ
Therefore, to make the output voltage at release 5.99V or higher under the above conditions, the pull-up resistance must be
100kΩ or less.
9) If the discharge time of the delay capacitance Cd at detection is short and the delay capacitance Cd cannot be discharged to
ground level, charging will take place at the next release operation with electric charge remaining in the delay capacitance Cd,
and this may cause the release delay time to become noticeably short.
10) If the charging time of the delay capacitance Cd at release is short and the delay capacitance Cd cannot be charged to the
VIN level, the delay capacitance Cd will discharge from less than the VIN level at the next detection operation, and this may
cause the detect delay time to become noticeably short.
11) Torex places an importance on improving our products and their reliability.
We request that users incorporate fail-safe designs and post-aging protection treatment when using Torex products in their systems.
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