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TMS320TCI6484 Datasheet, PDF (99/242 Pages) Texas Instruments – Communications Infrastructure Digital Signal Processor
TMS320TCI6484
Communications Infrastructure Digital Signal Processor
www.ti.com
SPRS438E—October 2009
Figure 8-6 shows a general transfer between the DSP and an external device. The figure also shows board route
delays and how they are perceived by the DSP and the external device
Figure 8-6 Board-Level Input/Output Timings
AECLKOUT
(Output from DSP)
AECLKOUT
(Input to External Device)
Control Signals (A)
(Output from DSP)
Control Signals
(Input to External Device)
Data Signals (B)
(Output from External Device)
Data Signals (B)
(Input to DSP)
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2
3
4
5
6
7
8
9
10
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(A) Control signals include data for writes.
(B) Data signals are generated during reads from an external device.
8.2 Recommended Clock and Control Signal Transition Behavior
All clocks and control signals must transition between VIH and VIL (or between VIL and VIH) in a monotonic
manner.
Copyright © 2009 Texas Instruments Incorporated
C64x+ Peripheral Information and Electrical Specifications 99