PCI1210GGU Datasheet, PDF (99/128 Pages) Texas Instruments – PCI1210 GGU/PGE PC CARD CONTROLLERS

PCI1210 GGU/PGE
PC CARD CONTROLLERS
SCPS032A– APRIL 1998
ExCA memory window 0–4 offset-address high-byte register (index 15h, 1Dh, 25h, 2Dh, 35h)
Bit
7
6
5
4
3
2
1
0
Name
ExCA memory window 0–4 offset-address high byte
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
Register: ExCA memory window 0 offset-address high byte
Offset:
CardBus socket address + 815h; ExCA offset 15h
Register: ExCA memory window 1 offset-address high byte
Offset:
CardBus socket address + 81Dh; ExCA offset 1Dh
Register: ExCA memory window 2 offset-address high byte
Offset:
CardBus socket address + 825h; ExCA offset 25h
Register: ExCA memory window 3 offset-address high byte
Offset:
CardBus socket address + 82Dh; ExCA offset 2Dh
Register: ExCA memory window 4 offset-address high byte
Offset:
CardBus socket address + 835h; ExCA offset 35h
Type:
Read/write (see individual bit descriptions)
Default: 00h
Size:
One byte
Description: These registers contain the high six bits of the 16-bit memory window offset address for
memory windows 0, 1, 2, 3 and 4. The lower six bits of these registers correspond to bits
A25–A20 of the offset address. In addition, the write protection and common/attribute
memory configurations are set in this register. See Table 51 for a complete description of the
register contents.
Table 51. ExCA Memory Window 0–4 Offset-Address High-Byte Register (Index 15h, 1Dh, 25h, 2Dh, 35h)
BIT SIGNAL TYPE
FUNCTION
Write protect. Bit 7 specifies whether write operations to this memory window are enabled. This bit is
7
WINWP
R/W
encoded as:
0 = Write operations are allowed (default).
1 = Write operations are not allowed.
Bit 6 specifies whether this memory window is mapped to card attribute or common memory. This bit is
6
REG
R/W
encoded as:
0 = Memory window is mapped to common memory (default).
1 = Memory window is mapped to attribute memory.
5–0
OFFHB
R/W
Offset-address high byte. Bits 5–0 represent the upper address bits A25–A20 of the memory window
offset address.
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