PCI1210GGU Datasheet, PDF (103/128 Pages) Texas Instruments – PCI1210 GGU/PGE PC CARD CONTROLLERS

PCI1210 GGU/PGE
PC CARD CONTROLLERS
SCPS032A– APRIL 1998
ExCA memory window 0–4 page register
Bit
7
6
5
4
3
2
1
0
Name
ExCA memory window 0–4 page
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
Register: ExCA memory window 0–4 page
Type:
Read/write
Offset:
CardBus socket address + 840h 841h, 842h, 843h, 844h
Default: 00h
Description: The upper eight bits of a 4-byte PCI memory address are compared to the contents of this
register when decoding addresses for 16-bit memory windows. Each window has its own
page register, all of which default to 00h. By programming this register to a nonzero value,
host software can locate 16-bit memory windows in any one of 256 16M-byte regions in the
4G-byte PCI address space. These registers are accessible only when the ExCA registers are
memory mapped, i.e., these registers can not be accessed using the index/data I/O scheme.
CardBus socket registers
The PCMCIA CardBus specification requires a CardBus socket controller to provide five 32-bit registers that
report and control socket-specific functions. The PCI1210 provides the CardBus socket/ExCA base address
register (PCI offset 10h) to locate these CardBus socket registers in PCI memory address space. Each socket
has a separate base address register for accessing the CardBus socket registers (see Figure 22). Table 54
gives the location of the socket registers in relation to the CardBus socket/ExCA base address.
The PCI1210 implements an additional register at offset 20h that provides power management control for the
socket.
Host
PCI1210 Configuration Registers
Offset
Memory Space
Offset
CardBus Socket/ExCA Base Address
10h
00h
CardBus
Socket
Registers
20h
16-Bit Legacy-Mode Base Address
44h
ExCA
Registers
800h
844h
Figure 22. Accessing CardBus Socket Registers Through PCI Memory
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