TMS320C6474_14 Datasheet, PDF (97/215 Pages) Texas Instruments – Multicore Digital Signal Processor

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TMS320C6474
SPRS552H – OCTOBER 2008 – REVISED APRIL 2011
Table 7-7. EDMA3 Transfer Controller 0 Registers (continued)
HEX ADDRESS RANGE
02A2 0300
02A2 0304
02A2 0308
02A2 030C
02A2 0310
02A2 0314
02A2 0318 - 02A2 033C
02A2 0340
02A2 0344
02A2 0348
02A2 034C
02A2 0350
02A2 0354
02A2 0358 - 02A2 037C
02A2 0380
02A2 0384
02A2 0388
02A2 038C
02A2 0390
02A2 0394
02A2 0398 - 02A2 03BC
02A2 03C0
02A2 03C4
02A2 03C8
02A2 03CC
02A2 03D0
02A2 03D4
02A2 03D8 - 02A2 7FFC
ACRONYM
DFOPT0
DFSRC0
DFCNT0
DFDST0
DFBIDX0
DFMPPRXY0
-
DFOPT1
DFSRC1
DFCNT1
DFDST1
DFBIDX1
DFMPPRXY1
-
DFOPT2
DFSRC2
DFCNT2
DFDST2
DFBIDX2
DFMPPRXY2
-
DFOPT3
DFSRC3
DFCNT3
DFDST3
DFBIDX3
DFMPPRXY3
-
REGISTER NAME
Destination FIFO Options Register 0
Destination FIFO Source Address Register 0
Destination FIFO Count Register 0
Destination FIFO Destination Address Register 0
Destination FIFO BIDX Register 0
Destination FIFO Memory Protection Proxy Register 0
Reserved
Destination FIFO Options Register 1
Destination FIFO Source Address Register 1
Destination FIFO Count Register 1
Destination FIFO Destination Address Register 1
Destination FIFO BIDX Register 1
Destination FIFO Memory Protection Proxy Register 1
Reserved
Destination FIFO Options Register 2
Destination FIFO Source Address Register 2
Destination FIFO Count Register 2
Destination FIFO Destination Address Register 2
Destination FIFO BIDX Register 2
Destination FIFO Memory Protection Proxy Register 2
Reserved
Destination FIFO Options Register 3
Destination FIFO Source Address Register 3
Destination FIFO Count Register 3
Destination FIFO Destination Address Register 3
Destination FIFO BIDX Register 3
Destination FIFO Memory Protection Proxy Register 3
Reserved
HEX ADDRESS RANGE
02A2 8000
02A2 8004
02A2 8008 - 02A2 80FC
02A2 8100
02A2 8104 - 02A2 811C
02A2 8120
02A2 8124
02A2 8128
02A2 812C
02A2 8130
02A2 8134 - 02A2 813C
02A2 8140
02A2 8144 - 02A2 823C
02A2 8240
02A2 8244
02A2 8248
Table 7-8. EDMA3 Transfer Controller 1 Registers
ACRONYM
PID
TCCFG
-
TCSTAT
-
ERRSTAT
ERREN
ERRCLR
ERRDET
ERRCMD
-
RDRATE
-
SAOPT
SASRC
SACNT
REGISTER NAME
Peripheral Identification Register
EDMA3TC Configuration Register
Reserved
EDMA3TC Channel Status Register
Reserved
Error Register
Error Enable Register
Error Clear Register
Error Details Register
Error Interrupt Command Register
Reserved
Read Rate Register
Reserved
Source Active Options Register
Source Active Source Address Register
Source Active Count Register
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Peripheral Information and Electrical Specifications
97
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