LM3S9U92_15 Datasheet, PDF (959/1412 Pages) Texas Instruments – Stellaris LM3S9U92 Microcontroller

Stellaris^® LM3S9U92 Microcontroller
Register 15: Ethernet MAC Timer Support (MACTS), offset 0x03C
This register enables software to enable highly precise timing on the transmission and reception of
frames. To enable this function, set the TSEN bit.
Ethernet MAC Timer Support (MACTS)
Base 0x4004.8000
Offset 0x03C
Type R/W, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
TSEN
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:1
0
Name
reserved
TSEN
Type
Reset Description
RO 0x0000.000 Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
R/W
0
Time Stamp Enable
Value Description
1 The TX and RX interrupts are routed to the CCP inputs of
General-Purpose Timer 3.
0 No effect.
July 03, 2014
959
Texas Instruments-Production Data