LM3S9U92_15 Datasheet, PDF (1205/1412 Pages) Texas Instruments – Stellaris LM3S9U92 Microcontroller

Stellaris^® LM3S9U92 Microcontroller
Bit/Field
2
1
0
Name
DCMP2
DCMP1
DCMP0
Type
R/W
R/W
R/W
Reset
0
0
0
Description
Digital Comparator 2
Value Description
0 The trigger from digital comparator 2 is suppressed and cannot
generate a fault condition.
1 The trigger from digital comparator 2 is ORed with all other fault
condition generation inputs (Faultn signals and digital
comparators).
Note: The FLTSRC bit in the PWMnCTL register must be set for this
bit to affect fault condition generation.
Digital Comparator 1
Value Description
0 The trigger from digital comparator 1 is suppressed and cannot
generate a fault condition.
1 The trigger from digital comparator 1 is ORed with all other fault
condition generation inputs (Faultn signals and digital
comparators).
Note: The FLTSRC bit in the PWMnCTL register must be set for this
bit to affect fault condition generation.
Digital Comparator 0
Value Description
0 The trigger from digital comparator 0 is suppressed and cannot
generate a fault condition.
1 The trigger from digital comparator 0 is ORed with all other fault
condition generation inputs (Faultn signals and digital
comparators).
Note: The FLTSRC bit in the PWMnCTL register must be set for this
bit to affect fault condition generation.
July 03, 2014
Texas Instruments-Production Data
1205