OMAPL138B-EP_16 Datasheet, PDF (91/284 Pages) Texas Instruments – OMAPL138B C6-Integra DSP ARM Processor

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OMAPL138B-EP
SPRS815C – DECEMBER 2011 – REVISED APRIL 2013
PLLCTL[CLKMODE]
OSCIN
Square
Wave
1
Crystal 0
PLLCTL[EXTCLKSRC]
PLL1_SYSCLK3 1
0
PLLCTL[PLLEN]
0
PREDIV
PLL
POSTDIV ₁
PLLM
14h
SYSCLK1
17h
SYSCLK2
18h
SYSCLK3
19h
SYSCLK4
1Ah
SYSCLK5
1Bh
SYSCLK6
1Ch
SYSCLK7
1Dh
PLLC1 OBSCLK
1Eh
ODSICVD4.I5V
PLL Controller 0
PLLDIV1 (/1)
PLLDIV2 (/2)
PLLDIV4 (/4)
PLLDIV5 (/3)
PLLDIV6 (/1)
PLLDIV7 (/6)
PLLDIV3 (/3)
DIV4.5
SYSCLK1
SYSCLK2
SYSCLK4
SYSCLK5
SYSCLK6
SYSCLK7
SYSCLK3
0
EMIFA
Internal
Clock
1
Source
CFGCHIP3[EMA_CLKSRC]
AUXCLK
PLLC0 OBSCLK
(CLKOUT Pin)
OCSEL[OCSRC]
PLLCTL[PLLEN]
0
PLL
POSTDIV
1
PLLM
14h
SYSCLK1
17h
SYSCLK2
18h
SYSCLK3
19h
OSCDIV
PLL Controller 1
PLLDIV2 (/2)
SYSCLK2
PLLDIV3 (/3)
SYSCLK3
PLLDIV1 (/1)
SYSCLK1
DDR2/mDDR
Internal
Clock
Source
PLLC1 OBSCLK
OCSEL[OCSRC]
Figure 5-10. PLL Topology
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Peripheral Information and Electrical Specifications
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