OMAPL138B-EP_16 Datasheet, PDF (197/284 Pages) Texas Instruments – OMAPL138B C6-Integra DSP ARM Processor

OMAPL138B-EP
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SPRS815C – DECEMBER 2011 – REVISED APRIL 2013
Table 5-92. Universal Serial Bus OTG (USB0) Registers (continued)
BYTE ADDRESS
0x01E0 040C
0x01E0 040E
0x01E0 040F
0x01E0 0410
0x01E0 0412
0x01E0 0414
0x01E0 0416
0x01E0 0418
0x01E0 041A
0x01E0 041B
0x01E0 041C
0x01E0 041D
0x01E0 041F
0x01E0 0420
0x01E0 0424
0x01E0 0428
0x01E0 042C
0x01E0 0430
0x01E0 0460
0x01E0 0462
0x01E0 0463
0x01E0 0464
ACRONYM
REGISTER DESCRIPTION
FRAME
Frame Number Register
INDEX
Index Register for Selecting the Endpoint Status and Control Registers
TESTMODE
Register to Enable the USB 2.0 Test Modes
Indexed Registers
These registers operate on the endpoint selected by the INDEX register
TXMAXP
Maximum Packet Size for Peripheral/Host Transmit Endpoint
(Index register set to select Endpoints 1-4 only)
PERI_CSR0
Control Status Register for Endpoint 0 in Peripheral Mode.
(Index register set to select Endpoint 0)
HOST_CSR0
Control Status Register for Endpoint 0 in Host Mode.
(Index register set to select Endpoint 0)
PERI_TXCSR
Control Status Register for Peripheral Transmit Endpoint.
(Index register set to select Endpoints 1-4)
HOST_TXCSR
Control Status Register for Host Transmit Endpoint.
(Index register set to select Endpoints 1-4)
RXMAXP
Maximum Packet Size for Peripheral/Host Receive Endpoint
(Index register set to select Endpoints 1-4 only)
PERI_RXCSR
Control Status Register for Peripheral Receive Endpoint.
(Index register set to select Endpoints 1-4)
HOST_RXCSR
Control Status Register for Host Receive Endpoint.
(Index register set to select Endpoints 1-4)
COUNT0
Number of Received Bytes in Endpoint 0 FIFO.
(Index register set to select Endpoint 0)
RXCOUNT
Number of Bytes in Host Receive Endpoint FIFO.
(Index register set to select Endpoints 1- 4)
HOST_TYPE0
Defines the speed of Endpoint 0
HOST_TXTYPE
Sets the operating speed, transaction protocol and peripheral endpoint number for
the host Transmit endpoint. (Index register set to select Endpoints 1-4 only)
HOST_NAKLIMIT0
Sets the NAK response timeout on Endpoint 0.
(Index register set to select Endpoint 0)
HOST_TXINTERVAL
Sets the polling interval for Interrupt/ISOC transactions or the NAK response
timeout on Bulk transactions for host Transmit endpoint. (Index register set to
select Endpoints 1-4 only)
HOST_RXTYPE
Sets the operating speed, transaction protocol and peripheral endpoint number for
the host Receive endpoint. (Index register set to select Endpoints 1-4 only)
HOST_RXINTERVAL
Sets the polling interval for Interrupt/ISOC transactions or the NAK response
timeout on Bulk transactions for host Receive endpoint. (Index register set to select
Endpoints 1-4 only)
CONFIGDATA
Returns details of core configuration. (Index register set to select Endpoint 0)
FIFO
FIFO0
Transmit and Receive FIFO Register for Endpoint 0
FIFO1
Transmit and Receive FIFO Register for Endpoint 1
FIFO2
Transmit and Receive FIFO Register for Endpoint 2
FIFO3
Transmit and Receive FIFO Register for Endpoint 3
FIFO4
Transmit and Receive FIFO Register for Endpoint 4
OTG Device Control
DEVCTL
Device Control Register
Dynamic FIFO Control
TXFIFOSZ
Transmit Endpoint FIFO Size
(Index register set to select Endpoints 1-4 only)
RXFIFOSZ
Receive Endpoint FIFO Size
(Index register set to select Endpoints 1-4 only)
TXFIFOADDR
Transmit Endpoint FIFO Address
(Index register set to select Endpoints 1-4 only)
Copyright © 2011–2013, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications 197
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