DAC38RF80 Datasheet, PDF (90/152 Pages) Texas Instruments – Dual- or Single-Channel, Single-Ended or Differential-Output, 14-bit, 9-GSPS, RF-Sampling DAC with JESD204B Interface and On-Chip PLL

DAC38RF80, DAC38RF83, DAC38RF84
DAC38RF85, DAC38RF90, DAC38RF93
SLASEA3 – DECEMBER 2016
www.ti.com
8.5.22 Output Summation and Delay Register (address = 0x19) [reset = 0x0000]
Figure 91. Output Summation and Delay Register (OUTSUM)
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
x
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7
6
5
4
3
2
1
0
0
0
0
1
1
0
0
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 63. OUTSUM Field Descriptions
Bit
15:12
11:4
Field
OUTPUT_DELAY
Reserved
3:0 OUTSUM_SEL
Type
R/W
R/W
Reset
0x0
0x00
R/W
0x0
Description
Delays the output to the DAC 0 to 15 clock cycles
Reserved
Selects the output summing functions. Each bit selects another
sample to sum. Multiple bits can be selected.
bit 0 = add the isfirab
bit 1 = add the isfircb
bit 2 = add adjacent slice AB sample
bit 3 = add adjacent slice CD sample
8.5.23 NCO Phase Path AB Register (address = 0x1C) [reset = 0x0000]
Figure 92. NCO Phase Path AB Register (PHASE_NCOAB)
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
x
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7
6
5
4
3
2
1
0
0
0
0
1
1
1
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit Field
15:0 PHASE_NCO1
Table 64. PHASE_NCOAB Field Descriptions
Type
Auto
Sync
Reset
0x0000
Description
The phase offset for the FULL NCO1 in the AB datapath.
8.5.24 NCO Phase Path CD Register (address = 0x1D) [reset = 0x0000]
Figure 93. NCO Phase Path CD Register (PHASE_NCOCD)
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7
6
5
4
3
2
1
0
0
0
0
1
1
1
0
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit Field
15:0 PHASE_NCO12
Table 65. PHASE_NCOCD Field Descriptions
Type
Auto
Sync
Reset
0x0000
Description
The phase offset for the FULL NCO2 in the CD datapath.
90
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