TCAN1042-Q1 Datasheet, PDF (9/32 Pages) Texas Instruments – Automotive Fault Protected CAN Tranceiver

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TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1
TCAN1042HV-Q1, TCAN1042G-Q1, TCAN1042GV-Q1
TCAN1042HG-Q1, TCAN1042HGV-Q1
SLLSES9 – FEBRUARY 2016
7.6 Switching Characteristics
Over recommended operating conditions with T_A = -55°C to 125°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
DEVICE SWITCHING CHARACTERISTICS
t_PROP(LOOP1)
t_PROP(LOOP2)
Total loop delay, driver input (TXD) to receiver
output (RXD), recessive to dominant
Total loop delay, driver input (TXD) to receiver
output (RXD), dominant to recessive
See Figure 8, STB = 0 V, R_L = 60
Ω,
C_L = 100 pF, C_L(RXD) = 15 pF
t_MODE
Mode change time, from Normal to Standby or
from Standby to Normal
See Figure 7
t_{WK_FILTER}
DRIVER SWITCHING CHARACTERISTICS
t_pHR
Propagation delay time, HIGH TXD to Driver
Recessive
t_pLD
t_sk(p)
t_R
t_F
t_{TXD_DTO}
Propagation delay time, LOW TXD to Driver
Dominant
Pulse skew (|t_pHR - t_pLD|)
Differential output signal rise time
Differential output signal fall time
Dominant timeout⁽²⁾
RECEIVER SWITCHING CHARACTERISTICS
See Figure 5, STB = 0 V, R_L = 60
Ω,
C_L = 100 pF, R_CM = open
See Figure 10, STB = 0 V, R_L = 60
Ω, C_L = open
t_pRH
Propagation delay time, bus recessive input to
high output
t_pDL
Propagation delay time, bus dominant input to
low output
t_R
RXD Output signal rise time
t_F
RXD Output signal fall time
FD Timing Parameters
See Figure 6, STB = 0 V, C_L(RXD) =
15 pF
t_BIT(BUS)
Bit time on CAN bus output pins with t_BIT(TXD) =
500 ns, all devices
Bit time on CAN bus output pins with t_BIT(TXD) =
200 ns, G device variants only
t_BIT(RXD)
Bit time on RXD output pins with t_BIT(TXD) = 500
ns, all devices
Bit time on RXD output pins with t_BIT(TXD) = 200
ns, G device variants only
See Figure 9 , STB = 0 V, R_L =
60Ω, C_L = 100pF, C_L(RXD) = 15pF
Δt_REC
Receiver timing symmetry with t_BIT(TXD) = 500
ns, all devices
Receiver timing symmetry with t_BIT(TXD) = 200
ns, G device variants only
MIN TYP⁽¹⁾ MAX UNIT
100 160
ns
110 175
1 45
µs
0.5
1.85
75
55
ns
20
45
45
1.2
3.8 ms
65
ns
50
ns
10
ns
10
ns
435
530
155
210
400
550
ns
120
220
-65
40
-45
15
(1) All typical values are at 25°C and supply voltages of V_CC = 5 V and V_IO = 5 V, R_L = 60 Ω.
(2) The TXD dominant timeout (t_{(TXD_DTO)}) disables the driver of the transceiver once the TXD has been dominant longer than t_{(TXD_DTO)},
which releases the bus lines to recessive, preventing a local failure from locking the bus dominant. The driver may only transmit
dominant again after TXD has been returned HIGH (recessive). While this protects the bus from local faults, locking the bus dominant, it
limits the minimum data rate possible. The CAN protocol allows a maximum of eleven successive dominant bits (on TXD) for the worst
case, where five successive dominant bits are followed immediately by an error frame. This, along with the t_{(TXD_DTO)} minimum, limits
the minimum bit rate. The minimum bit rate may be calculated by: Minimum Bit Rate = 11 / t_{(TXD_DTO)}
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Product Folder Links: TCAN1042-Q1 TCAN1042V-Q1 TCAN1042H-Q1 TCAN1042HV-Q1 TCAN1042G-Q1
TCAN1042GV-Q1 TCAN1042HG-Q1 TCAN1042HGV-Q1