TCAN1042-Q1 Datasheet, PDF (25/32 Pages) Texas Instruments – Automotive Fault Protected CAN Tranceiver

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TCAN1042-Q1, TCAN1042V-Q1, TCAN1042H-Q1
TCAN1042HV-Q1, TCAN1042G-Q1, TCAN1042GV-Q1
TCAN1042HG-Q1, TCAN1042HGV-Q1
SLLSES9 – FEBRUARY 2016
12.1 Layout Guidelines
• Place the protection and filtering circuitry as close to the bus connector, J1, to prevent transients, ESD and
noise from penetrating onto the board. In this layout example for protection a Transient Voltage Suppression
(TVS) device, D1, has been used. The production solution can be either bi-directional TVS diode or varistor
with ratings matching the application requirements. This example also shows optional bus filter capacitors C4
and C5. Additionally (not shown) a series optional Common Mode Choke (CMC) can be placed on the CANH
and CANL lines between the transceiver U1 and connector J1.
• Design the bus protection components in the direction of the signal path. Do not force the transient current to
divert from the signal path to reach the protection device.
• Use supply (V_CC) and ground planes to provide low inductance. Note: high frequency current follows the path
of least inductance and not the path of least resistance.
• Use at least two vias for supply (V_CC) and ground connections of bypass capacitors and protection devices to
minimize trace and via inductance.
• Bypass and bulk capacitors should be placed as close as possible to the supply terminals of transceiver,
examples C1, C2 (V_CC).
• Bus termination: this layout example shows split termination. This is where the termination is split into two
resistors, R6 and R7, with the center or split tap of the termination connected to ground via capacitor C3. Split
termination provides common mode filtering for the bus. When bus termination is placed on the board instead
of directly on the bus, additional care must be taken to ensure the terminating node is not removed from the
bus thus also removing the termination. See the application section for information on power ratings needed
for the termination resistor(s).
• To limit current of digital lines, serial resistors may be used. Examples are R2, R3, and R4. These are not
required.
• Terminal 1: R1 is shown optionally for the TXD input of the device. If an open drain host processor is used,
this is mandatory to ensure the bit timing into the device is met.
• Terminal 5: For "V" variants of the TCAN1042 family, bypass capacitors should be placed as close to the pin
as possible (example C6 and C7). For device options without V_IO I/O level shifting, this pin is not internally
connected and can be left floating or tied to any existing net, for example a split pin connection.
• Terminal 8: is shown assuming the mode terminal, STB, will be used. If the device will only be used in normal
mode, R4 is not needed and R5 could be used for the pull down resistor to GND.
12.2 Layout Example
Copyright © 2016, Texas Instruments Incorporated
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Product Folder Links: TCAN1042-Q1 TCAN1042V-Q1 TCAN1042H-Q1 TCAN1042HV-Q1 TCAN1042G-Q1
TCAN1042GV-Q1 TCAN1042HG-Q1 TCAN1042HGV-Q1