DRV8830_16 Datasheet, PDF (9/22 Pages) Texas Instruments – Low-Voltage Motor Driver With Serial Interface

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DRV8830
SLVSAB2G – MAY 2010 – REVISED DECEMBER 2015
Feature Description (continued)
Note that if the programmed output voltage is greater than the supply voltage, the device will operate at 100%
duty cycle and the voltage regulation feature will be disabled. In this mode the device behaves as a conventional
H-bridge driver.
During the PWM off time, winding current is recirculated by enabling both of the high-side FETs in the bridge.
This is shown in Figure 8.
VCC
2
1
OUT1
OUT2
Shown with
IN1=1, IN2=0
1 PWM on
2 PWM off
Figure 8. Voltage Regulation
7.3.2 Voltage Setting (VSET DAC)
The DRV8830 includes an internal reference voltage that is connected to a DAC. This DAC generates a voltage
which is used to set the PWM regulated output voltage as described in Voltage Regulation.
The DAC is controlled by the VSET bits from the serial interface. The commanded output voltage is shown in
Table 1.
VSET[5..0]
0x00h
0x01h
0x02h
0x03h
0x04h
0x05h
0x06h
0x07h
0x08h
0x09h
0x0Ah
0x0Bh
0x0Ch
0x0Dh
0x0Eh
0x0Fh
Table 1. Commanded Output Voltage
OUTPUT VOLTAGE
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
0.48
0.56
0.64
0.72
0.80
0.88
0.96
1.04
1.12
1.20
VSET[5..0]
0x20h
0x21h
0x22h
0x23h
0x24h
0x25h
0x26h
0x27h
0x28h
0x29h
0x2Ah
0x2Bh
0x2Ch
0x2Dh
0x2Eh
0x2Fh
OUTPUT VOLTAGE
2.57
2.65
2.73
2.81
2.89
2.97
3.05
3.13
3.21
3.29
3.37
3.45
3.53
3.61
3.69
3.77
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