DRV8830_16 Datasheet, PDF (13/22 Pages) Texas Instruments – Low-Voltage Motor Driver With Serial Interface

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DRV8830
SLVSAB2G – MAY 2010 – REVISED DECEMBER 2015
11
S
(As)
0
W
Slave
Address
(An)
Sub
Address
11
R
S
(As)
(Dn)
0
Slave
Address
Data
Figure 9. I²C Read Mode
(Dn+1)
Data
11
S
(As)
0
W
Slave
Address
(An)
(Dn)
Sub
Address
Data
Figure 10. I²C Write Mode
(Dn+1)
Data
7.6 Register Maps
7.6.1 I²C Register Map
REGISTER
0
1
SUB ADDRESS (HEX)
0x00
0x01
Table 6. I²C Register Map
REGISTER NAME
DEFAULT VALUE
CONTROL
0x00h
FAULT
0x00h
DESCRIPTION
Sets state of outputs and output
voltage
Allows reading and clearing of fault
conditions
7.6.1.1 REGISTER 0 – CONTROL
The CONTROL register is used to set the state of the outputs as well as the DAC setting for the output voltage.
The register is defined as follows:
Table 7. Register 0 – Control
D7 - D2
D1
D0
VSET[5..0]
IN2
IN1
VSET[5..0]:
IN2:
IN1:
Sets DAC output voltage. Refer to Voltage Setting above.
Along with IN1, sets state of outputs. Refer to Bridge Control above.
Along with IN2, sets state of outputs. Refer to Bridge Control above.
7.6.1.2 REGISTER 1 – FAULT
The FAULT register is used to read the source of a fault condition, and to clear the status bits that indicated the
fault. The register is defined as follows:
D7
CLEAR
D6 - D5
Unused
Table 8. Register 1 – Fault
D4
ILIMIT
D3
OTS
D2
UVLO
D1
OCP
D0
FAULT
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