DRV8830_16 Datasheet, PDF (6/22 Pages) Texas Instruments – Low-Voltage Motor Driver With Serial Interface

DRV8830
SLVSAB2G – MAY 2010 – REVISED DECEMBER 2015
6.6 I²C Timing Requirements⁽¹⁾
V_CC = 2.75 V to 6.8 V, T_A = -40°C to 85°C (unless otherwise noted)
STANDARD MODE
FAST MODE
f_scl
t_sch
t_scl
t_sp
t_sds
t_sdh
t_icr
t_icf
t_ocf
t_buf
t_sts
t_sth
t_sps
t_vd (data)
t_vd (ack)
I²C clock frequency
I²C clock high time
I²C clock low time
I²C spike time
I²C serial data setup time
I²C serial data hold time
I²C input rise time
I²C input fall time
I²C output fall time
I²C bus free time
I²C Start setup time
I²C Start hold time
I²C Stop setup time
Valid data time (SCL low to SDA valid)
Valid data time of ACK (ACK signal from SCL low
to SDA low)
MIN NOM MAX
MIN NOM
0
100
0
4
0.6
4.7
1.3
0
50
0
250
100
0
0
1000 20+0.1Cb⁽²⁾
300 20+0.1Cb⁽²⁾
300 20+0.1Cb⁽²⁾
4.7
1.3
4.7
0.6
4
0.6
4
0.6
1
1
(1) Not production tested.
(2) C_b = total capacitance of one bus line in pF
t_icf
t_icr
t_sdh
tvd
0.7 VCC
SDA
0.3 VCC
Start Condition
t_icf
0.7 VCC
SCL
0.3 VCC
t_icr
1
tsds
2
t_sch
3
4
tscl
t_sth
1/fscl
Figure 1. I²C Timing Requirements
www.ti.com
MAX
400
50
300
300
300
1
1
UNIT
kHz
µs
µs
ns
ns
ns
ns
ns
ns
µs
µs
µs
µs
µs
µs
0.7 VCC
SDA
0.3 VCC
0.7 VCC
SCL
0.3 VCC
t_vd
D7/A
Stop Condition
t_buf
t_sds
8
9
t_sps
Figure 2. I²C Timing Requirements
Start Condition
6
Submit Documentation Feedback
Product Folder Links: DRV8830
Copyright © 2010–2015, Texas Instruments Incorporated