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BQ24314C Datasheet, PDF (9/26 Pages) Texas Instruments – Li+ Charger Front-End Protection IC
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bq24314C
SLUSAV3A – AUGUST 2012 – REVISED JULY 2015
7.3 Feature Description
7.3.1 Input Overvoltage Protection
The bq24314C device integrates an input overvoltage protection feature to protect downstream devices from
faulty input sources. If the input voltage rises above VOVP, the internal FET Q1 is turned off, removing power from
the circuit. As shown in Figure 15 to Figure 16, the response is very rapid, with the FET turning off in less than a
microsecond. The FAULT pin is driven low. When the input voltage returns below VOVP – Vhys(OVP) (but is still
above UVLO), the FET Q1 is turned on again after a deglitch time of tON(OVP) to ensure that the input supply has
stabilized. Figure 17 shows the recovery from input OVP.
7.3.2 Input Overcurrent Protection
The overcurrent threshold is programmed by a resistor RILIM connected from the ILIM pin to VSS. Figure 4 shows
the OCP threshold as a function of RILIM, and may be approximated by the following equation:
IOCP = 25 ÷ RILIM (current in A, resistance in kΩ),
where
• RILIM must be between 15 kΩ and 90 kΩ
(1)
If the load current tries to exceed the IOCP threshold, the device limits the current for a blanking duration of
tBLANK(OCP). If the load current returns to less than IOCP before tBLANK(OCP) times out, the device continues to
operate. However, if the overcurrent situation persists for tBLANK(OCP), the FET Q1 is turned off for a duration of
tREC(OCP), and the FAULT pin is driven low. The FET is then turned on again after tREC(OCP) and the current is
monitored all over again. Each time an OCP fault occurs, an internal counter is incremented. If 15 OCP faults
occur in one charge cycle, the FET is turned off permanently. The counter is cleared either by removing and re-
applying input power, or by disabling and re-enabling the device with the CE pin. Figure 18 to Figure 20 show
what happens in an overcurrent fault.
To prevent the input voltage from spiking up due to the inductance of the input cable, Q1 is turned off slowly,
resulting in a soft-stop, as shown in Figure 20.
7.3.3 Battery Overvoltage Protection
The battery overvoltage threshold BVOVP is internally set to 4.45 V. If the battery voltage exceeds the BVOVP
threshold, the FET Q1 is turned off, and the FAULT pin is driven low. The FET is turned back on once the battery
voltage drops to BVOVP – Vhys(Bovp) (see Figure 21 and Figure 22). Each time a battery overvoltage fault occurs,
an internal counter is incremented. If 15 such faults occur in one charge cycle, the FET is turned off permanently.
The counter is cleared either by removing and re-applying input power, or by disabling and re-enabling the
device with the CE pin. In the case of a battery overvoltage fault, Q1 is switched OFF gradually (see Figure 21).
7.3.4 Thermal Protection
If the junction temperature of the device exceeds TJ(OFF), the FET Q1 is turned off, and the FAULT pin is driven
low. The FET is turned back on when the junction temperature falls below TJ(OFF) – TJ(OFF-HYS).
7.3.5 Enable Function
The IC has an enable pin, which can be used to enable or disable the device. When the CE pin is driven high,
the internal FET is turned off. When the CE pin is low, the FET is turned on if other conditions are safe. The OCP
counter and the Bat-OVP counter are both reset when the device is disabled and re-enabled. The CE pin has an
internal pulldown resistor and can be left floating. Note that the FAULT pin functionality is also disabled when the
CE pin is high.
7.3.6 Fault Indication
The FAULT pin is an active-low open-drain output. It is in a high-impedance state when operating conditions are
safe, or when the device is disabled by setting CE high. With CE low, the FAULT pin goes low whenever any of
these events occurs:
• Input overvoltage
• Input overcurrent
• Battery overvoltage
• IC overtemperature
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