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BQ24314C Datasheet, PDF (14/26 Pages) Texas Instruments – Li+ Charger Front-End Protection IC
bq24314C
SLUSAV3A – AUGUST 2012 – REVISED JULY 2015
www.ti.com
Choosing RBAT in the range 100 kΩ to 470 kΩ is a good compromise. In the case of an device failure, with RBAT
equal to 100 kΩ, the maximum current flowing into the battery would be (30 V – 3 V) ÷ 100 kΩ = 246 μA, which
is low enough to be absorbed by the bias currents of the system components. RBAT equal to 100 kΩ would result
in a worst-case voltage drop of RBAT × IVBAT = 1 mV. This is negligible to compared to the internal tolerance of 50
mV on BVOVP threshold.
If the Bat-OVP function is not required, the VBAT pin should be connected to VSS.
8.2.2.2 Selection of RCE, RFAULT, and RPU
The CE pin can be used to enable and disable the IC. If host control is not required, the CE pin can be tied to
ground or left un-connected, permanently enabling the device.
In applications where external control is required, the CE pin can be controlled by a host processor. As in the
case of the VBAT pin (see above), the CE pin should be connected to the host GPIO pin through as large a
resistor as possible. The limitation on the resistor value is that the minimum VOH of the host GPIO pin less the
drop across the resistor should be greater than VIH of the bq24314C device's CE pin. The drop across the
resistor is given by RCE × IIH.
The FAULT pin is an open-drain output that goes low during OV, OC, battery-OV, and OT events. If the
application does not require monitoring of the FAULT pin, it can be left unconnected. But if the FAULT pin has to
be monitored, it should be pulled high externally through RPU, and connected to the host through RFAULT. RFAULT
prevents damage to the host controller if the bq24314C device fails (see above). The resistors should be of high
value, in practice values between 22 kΩ and 100 kΩ should be sufficient.
8.2.2.3 Selection of Input and Output Bypass Capacitors
The input capacitor CIN in Figure 12 is for decoupling, and serves an important purpose. Whenever there is a
step change downwards in the system load current, the inductance of the input cable causes the input voltage to
spike up. CIN prevents the input voltage from overshooting to dangerous levels. It is strongly recommended that a
ceramic capacitor of at least 1 μF be used at the input of the device. It should be located in close proximity to the
IN pin.
COUT in Figure 12 is also important: If a very fast (< 1 μs rise time) overvoltage transient occurs at the input, the
current that charges COUT causes the device’s current-limiting loop to kick in, reducing the gate-drive to FET Q1.
This results in improved performance for input overvoltage protection. COUT should also be a ceramic capacitor of
at least 1 μF, located close to the OUT pin. COUT also serves as the input decoupling capacitor for the charging
circuit downstream of the protection IC.
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