TMS320C28346_15 Datasheet, PDF (87/170 Pages) Texas Instruments – Delfino Microcontrollers

TMS320C28346, TMS320C28345, TMS320C28344
TMS320C28343, TMS320C28342, TMS320C28341
www.ti.com
Figure 4-13 shows the SCI module block diagram.
SPRS516D – MARCH 2009 – REVISED AUGUST 2012
Frame Format and Mode
Parity
Even/Odd Enable
SCICCR.6 SCICCR.5
TXWAKE
SCICTL1.3
1
WUT
LSPCLK
SCIHBAUD. 15 - 8
Baud Rate
MSbyte
Register
SCILBAUD. 7 - 0
Baud Rate
LSbyte
Register
SCIRXST.7 SCIRXST.4 - 2
RX Error
FE OE PE
RX Error
TXSHF
Register
SCICTL1.1
TXENA
8
Transmitter-Data
Buffer Register
8
TX FIFO _0
TX FIFO _1
-----
TX FIFO _15
SCITXBUF.7-0
TX FIFO Registers
SCIFFENA
SCIFFTX.14
TX
FIFO
Interrupts
SCITXD
TX EMPTY
SCICTL2.6
TXRDY TX INT ENA
SCICTL2.7
SCICTL2.0
TX Interrupt Logic
SCI TX Interrupt Select Logic
TXINT
To CPU
AutoBaud Detect Logic
RXSHF Register
RXENA
8
SCICTL1.0
Receive-Data
Buffer Register
SCIRXBUF.7-0
8
RX FIFO _15
-----
RX FIFO _1
RX FIFO _0
SCIRXBUF.7-0
RX FIFO Registers
RXFFOVF
SCIFFRX.15
RX
FIFO
Interrupts
SCIRXD
RXWAKE
SCIRXST.1
SCICTL2.1
RXRDY _{RX/BK INT ENA}
SCIRXST.6
BRKDT
SCIRXST.5
RX Interrupt Logic
RXINT
To CPU
RX ERR INT ENA
SCICTL1.6
SCI RX Interrupt Select Logic
SCITXD
SCIRXD
Figure 4-13. Serial Communications Interface (SCI) Module Block Diagram
Copyright © 2009–2012, Texas Instruments Incorporated
Peripherals
87
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TMS320C28341