AM3894_15 Datasheet, PDF (87/313 Pages) Texas Instruments – Sitara ARM Microprocessors

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SIGNAL
NAME
VOUT[1]_CLK/
VIN[1]A_CLK
VOUT[1]_AVID/
VIN[1]B_CLK
VOUT[1]_HSYNC
(silicon revision 1.x)
DAC_VOUT[1]_HSYNC
(silicon revision 2.x)/
VIN[1]A_D[15]
VIN[1]A_D[14]
VOUT[1]_C[7]/
VIN[1]A_D[13]
VOUT[1]_C[6]
VIN[1]A_D[12]
VOUT[1]_C[5]/
VIN[1]A_D[11]
VOUT[1]_C[4]/
VIN[1]A_D[10]
VOUT[1]_C[3]/
VIN[1]A_D[9]
VOUT[1]_C[2]/
VIN[1]A_D[8]
AM3894
AM3892
SPRS681G – OCTOBER 2010 – REVISED MARCH 2015
Table 4-26. Video Input 1 Terminal Functions
NO.
TYPE⁽¹⁾ OTHER ^{(2) (3)}
MUXED
DESCRIPTION
AT7
I
PULL: IPD / DIS
DRIVE: Z / Z
DVDD_3P3
VOUT[1]
PINCTRL46
Video Input 1 Port A Clock input. Input clock for 8-
bit or 16-bit Port A video capture. Input data is
sampled on the CLK0 edge.
AT4
I
PULL: IPD / IPD
DRIVE: Z / Z
DVDD_3P3
VOUT[1]
PINCTRL31
Video Input 1 Port B Clock input. Input clock for 8-
bit Port B video capture. Input data is sampled on
the CLK1 edge. This signal is not used in 16-bit
capture modes.
AR5
I
PULL: IPD / IPD
DRIVE: Z / Z
DVDD_3P3
VOUT[1]
PINCTRL21
AM3
AD13
AN8
AP8
AN7
AM8
AK6
I
PULL: IPD / IPD
DRIVE: Z / Z
DVDD_3P3
-
PINCTRL11
I
PULL: IPD / IPD
DRIVE: Z / Z
DVDD_3P3
VOUT[1]
PINCTRL10
I
PULL: IPD / IPD
DRIVE: Z / Z
DVDD_3P3
VOUT[1]
PINCTRL9
Video Input 1 Port A Data inputs. For 16-bit
capture, D[7:0] are Cb/Cr and [15:8] are Y Port A
inputs. For 8-bit capture, D[7:0] are Port A YCbCr
data inputs and D[15:8] are Port B YCbCr data
I
PULL: IPD / IPD
DRIVE: Z / Z
DVDD_3P3
VOUT[1]
PINCTRL8
inputs. For VIN[1], only D[15:0] are available.
I
PULL: IPD / IPD
DRIVE: Z / Z
DVDD_3P3
VOUT[1]
PINCTRL7
I
PULL: IPD / IPD
DRIVE: Z / Z
DVDD_3P3
VOUT[1]
PINCTRL6
I
PULL: IPD / IPD
DRIVE: Z / Z
DVDD_3P3
VOUT[1]
PINCTRL20
(1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal.
(2) PULL: A / B, where:
A is the state of the internal pull resistor during POR reset
B is the state of the internal pull resistor after POR and Warm reset are de-asserted and during Warm reset
IPD = Internal Pulldown Enabled, IPU = Internal Pullup Enabled, DIS = Internal Pull Disabled
DRIVE: A / B, where;
A is the driving state of the pin during POR reset
B is the driving state of the pin after POR and Warm reset are de-asserted and during Warm reset
H = Driving High, L = Driving Low, Z = 3-State
For more detailed information on pullup and pulldown resistors and situations where external pullup and pulldown resistors are required,
see Section 6.3.1, Pullup and Pulldown Resistors.
(3) Specifies the operating IO supply voltage for each signal.
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Terminal Configuration and Functions
87
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