TMS320DM642_17 Datasheet, PDF (82/178 Pages) Texas Instruments – Video/Imaging Fixed-Point Digital Signal Processor

TMS320DM642
SPRS200N – JULY 2002 – REVISED OCTOBER 2010
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CPU
INTERRUPT
NUMBER
–
–
Table 5-7. DM642 DSP Interrupts (continued)
INTERRUPT
SELECTOR
CONTROL
REGISTER
–
–
SELECTOR
VALUE
(BINARY)
11101
11110 – 11111
INTERRUPT
EVENT
ARINT0
Reserved
INTERRUPT SOURCE
McASP0 receive interrupt
Reserved. Do not use.
5.5.2 Interrupts Peripheral Register Description(s)
HEX ADDRESS RANGE
019C 0000
019C 0004
019C 0008
019C 000C – 019F FFFF
Table 5-8. Interrupt Selector Registers (C64x)
ACRONYM
REGISTER NAME
MUXH
Interrupt multiplexer high
MUXL
Interrupt multiplexer low
EXTPOL
–
External interrupt polarity
Reserved
COMMENTS
Selects which interrupts drive CPU
interrupts 10–15 (INT10–INT15)
Selects which interrupts drive CPU
interrupts 4–9 (INT04–INT09)
Sets the polarity of the external
interrupts (EXT_INT4–EXT_INT7)
5.5.3 External Interrupts Electrical Data/Timing
Table 5-9. Timing Requirements for External Interrupts⁽¹⁾ (see Figure 5-8)
NO.
1
t_w(ILOW)
2
t_w(IHIGH)
Width of the NMI interrupt pulse low
Width of the EXT_INT interrupt pulse low
Width of the NMI interrupt pulse high
Width of the EXT_INT interrupt pulse high
–500
–600
–720
MIN MAX
4P
8P
4P
8P
(1) P = 1/CPU clock frequency in ns. For example, when running parts at 720 MHz, use P = 1.39 ns.
UNIT
ns
ns
ns
ns
EXT_INTx, NMI
2
1
Figure 5-8. External/NMI Interrupt Timing
82
DM642 Peripheral Information and Electrical Specifications
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