CDC2586_08 Datasheet, PDF (8/14 Pages) Texas Instruments – 3.3-V PHASE-LOCK LOOP CLOCK DRIVER

CDC2586
SCAS337D – FEBRUARY 1993 – REVISED APRIL 2004
PARAMETER MEASUREMENT INFORMATION (continued)
CLKIN
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Outputs
Operating
at 1/2 CLKIN
Frequency
t_{phase error 1}
t_{phase error 2}
t_{phase error 3}
Outputs
Operating
at CLKIN
Frequency
t_{phase error 4}
t_{phase error 5}
t_{phase error 7}
t_{phase error 8}
t_{phase error 6}
t_{phase error 9}
A. Output skew, t_sk(o), is calculated as the greater of:
• The difference between the fastest and slowest of t_{phase error n} (n = 1, 2, . . . 6)
• The difference between the fastest and slowest of t_{phase error n} (n = 7, 8, 9)
B. Process skew, t_sk(pr), is calculated as the greater of:
• The difference between the maximum and minimum t_{phase error n} (n = 1, 2, . . . 6) across multiple devices under
identical operating conditions
• The difference between the maximum and minimum t_{phase error n} (n = 7, 8, 9) across multiple devices under
identical operating conditions
C. For configuration A, see Table 1
Figure 2. Waveforms for Calculation of t_sk(o)for Configuration A
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