CDC2586_08 Datasheet, PDF (7/14 Pages) Texas Instruments – 3.3-V PHASE-LOCK LOOP CLOCK DRIVER

CDC2586
www.ti.com
SCAS337D – FEBRUARY 1993 – REVISED APRIL 2004
SWITICHING CHARACTERISTICS
over recommended ranges of supply voltage and operating free-air temperature, C_L = 15 pF (see ⁽¹⁾ and Figure 1 through
Figure 3)
PARAMETER
f_max
Duty cycle
t_phase
(2)
error
jitter
t_sk(o) ⁽²⁾
t_sk(pr) ⁽²⁾
t_r
t_f
FROM
(INPUT)
CLKIN↑
CLKIN↑
TO
(OUTPUT)
Y
Y↑
Y↑
MIN MAX UNIT
45%
-500
100
55%
+500
200
0.5
1
1.4
1.4
MHz
ps
ps
ns
ns
ns
ns
(1) The specifications for parameters in this table are applicable only after any appropriate stabilization time has elapsed.
(2) The propagation delay, t_{phase error}, is dependent on the feedback path from any output to FBIN. The t_{phase error}, t_sk(o),and t_sk(pr)
specifications are valid only for equal loading of all outputs.
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
C_L = 15 pF
(see Note A)
500 Ω
Input
t_{phase error}
Output
1.5 V
2V
0.8 V
t_r
3V
1.5 V
0V
2V
1.5 V
t_f
V_OH
0.8 V _VOL
LOAD CIRCUIT
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
A. C_L includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 100 MHz, Z_O = 50 Ω,
t_r≤ 2.5 ns, t_f ≤ 2.5 ns.
C. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
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