BQ2022_13 Datasheet, PDF (8/20 Pages) Texas Instruments – 1K-BIT SERIAL EPROM WITH SDQ INTERFACE

bq2022
SLUS526F – OCTOBER 2002 – REVISED DECEMBER 2006
Initialization and ROM
Command
Sequence
READ MEMORY Command
F0h
Address Low
Byte
Read EPROM
Address High Read and Memory Until End
Byte
Verify CRC of EPROM
Memory
A0
A7 A8
A15
Figure 8. READ MEMORY/Field CRC
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Read and
Verify CRC
WRITE MEMORY
The WRITE MEMORY command is used to program the 1024-bit EPROM memory field. The 1024-bit memory
field is programmed in 8-byte segments. Data is first written into an 8-byte RAM buffer one byte at a time. The
contents of the RAM buffer is then ANDed with the contents of the EPROM memory field when the programming
command is issued.
Figure 9 illustrates the sequence of events for programming the EPROM memory field. After issuing a ROM
command, the host issues the WRITE MEMORY command, 0Fh, followed by the low byte and then the high
byte of the starting address. The bq2022 calculates and transmits an 8-bit CRC based on the WRITE command
and address.
If at any time during the WRITE MEMORY process, the CRC read by the host is incorrect, a reset pulse must be
issued, and the entire sequence must be repeated.
After the bq2022 transmits the CRC, the host then transmits 8 bytes of data to the bq2022. Another 8-bit CRC is
calculated and transmitted based on the 8 bytes of data. If this CRC agrees with the CRC calculated by the host,
the host transmits the program command 5Ah and then applies the programming voltage for at least 2500 µs or
t_EPROG. The contents of the RAM buffer is then logically ANDed with the contents of the 8-byte EPROM offset by
the starting address.
The starting address can be any integer multiple of eight between 0000 and 007F (hex) such as 0000, 0008,
and 0010 (hex).
The WRITE DATA MEMORY command sequence can be terminated at any point by issuing a reset pulse
except during the program pulse period t_PROG.
NOTE:
The bq2022 responds with the data from the selected EPROM address sent least
significant-bit first. This response should be checked to verify the programmed byte. If
the programmed byte is incorrect, then the host must reset the part and begin the
write sequence again.
For both of these cases, the decision to continue programming is made entirely by the host, because the
bq2022 is not able to determine if the 8-bit CRC calculated by the host agrees with the 8-bit CRC calculated by
the bq2022.
Prior to programming, bits in the 1024-bit EPROM data field appear as logical 1s.
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