BQ2022_13 Datasheet, PDF (5/20 Pages) Texas Instruments – 1K-BIT SERIAL EPROM WITH SDQ INTERFACE

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VPU
bq2022
SLUS526F – OCTOBER 2002 – REVISED DECEMBER 2006
SDQ 1
Communications
Controller
3 VSS
VSS 2
bq2022
CPU
HOST
Figure 1. Typical Applications Circuit
UDG-02055
Serial Communication
A host reads, programs, or checks the status of the bq2022 through the hierarchical command structure of the
SDQ interface. Figure 2 shows that the host must first issue a ROM command before the EPROM memory or
status can be read or modified. The ROM command either selects a specific device when multiple devices are
on the SDQ bus, or skips the selection process in single SDQ device applications.
Hidden para to force some space before figure 2 in the PDF.
Initialization
ROM Command Sequence
Memory/Status Command Sequence
Figure 2. General Command Sequence
Initialization
Initialization consists of two pulses, the RESET and the PRESENCE pulses. The host generates the RESET
pulse, while the bq2022 responds with the PRESENCE pulse. The host resets the bq2022 by driving the DATA
bus low for at least 480 µs. For more details, see the RESET section under SDQ Signaling.
ROM COMMANDS
READ ROM
The READ ROM command sequence is the fastest sequence that allows the host to read the 8-bit family code
and 48-bit identification number. It is used if only one SDQ slave device is attached to the bus. The READ ROM
sequence starts with the host generating the RESET pulse of at least 480 µs. The bq2022 responds with a
PRESENCE pulse. Next, the host continues by issuing the READ ROM command, 33h, and then reads the
ROM and CRC byte using the READ signaling (see the READ and WRITE signals section) during the data
frame.
Reset
and
Presence
Read ROM (33h)
Signals 1 1 0 0 1 1 0 ⁰
Family Code and Identification
Number (7 BYTES)
CRC (1 BYTE)
Figure 3. READ ROM Sequence
MATCH ROM
The MATCH ROM command, 55h, is used by the host to select a specific SDQ device when the family code and
identification number is known. The host issues the MATCH ROM command followed by the family code, ROM
number, and the CRC byte. Only the device that matches the 64-bit ROM sequence is selected and available to
perform subsequent Memory/Status Function commands.
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