DAC38RF82 Datasheet, PDF (73/139 Pages) Texas Instruments – Dual-Channel, Differential-Output, 14-bit, 9-GSPS, RF-Sampling DAC with JESD204B Interface, On-Chip PLL and Wide-Band Interpolation

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DAC38RF82, DAC38RF89
SLASEA6 – FEBRUARY 2017
8.5.14 Multi-DUC Configuration (Mixers) Register (address = 0x0C) [reset = 0x2402]
Figure 64. Multi-DUC Configuration (Mixers) Register (MULTIDUC_CFG2)
15
14
13
12
11
10
9
8
0
0
0
0
0
1
0
x
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7
6
5
4
3
2
1
0
0
0
0
0
1
1
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 57. MULTIDUC_CFG2 Field Descriptions
Bit
15:14
Field
DAC_BITWIDTH
13
ZERO_INVLD_DATA
12
SHORTTEST_ENA
11
BIST_ENA
10
BIST_ZERO
9
MIXERAB_ENA
8
MIXERCD_ENA
7
MIXERAB_GAIN
6
MIXERCD_GAIN
5
NCOAB_ENA
4
NCOCD_ENA
3:2 Reserved
1
TWOS
0
Reserved
Type
R/W
Reset
0b00
R/W
1
R/W
0
R/W
0
R/W
1
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
00
R/W
1
R/W
0
Description
Determines the bit width of the data going to the DAC
00: 14 bits
01: 14 bits
10: 12 bits
11: 11 bits
When asserted; the data from the JESD block is zeroed in the
mapper to prevent goofy output from the DAC. For test purposes
this bit should be desasserted
Turns on the JESD SHORT pattern test (5.1.6.2)
Turns on the BIST blocks in the SLICE.
Zeros out the bists captures.
Turns on the mixer for the A and B streams
Turns on the mixer for the C and D streams
Adds 6dB of gain when asserted
Adds 6dB of gain when asserted
When high the full NCO block is turned on.
When high the full NCO block is turned on.
Reserved
When asserted the chip is expecting 2's complement data is
arriving through the JESD; otherwise offset binary is expected
Reserved
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