TMS570LC4357 Datasheet, PDF (72/227 Pages) Texas Instruments – Hercules Microcontroller Based on the ARM® Cortex-R Core

TMS570LC4357
SPNS195C – FEBRUARY 2014 – REVISED JUNE 2016
www.ti.com
.text
.state32
.global __clearRegisters_
.asmfunc
__clearRegisters_:
mov r0, lr
mov r1, #0x0000
mov r2, #0x0000
mov r3, #0x0000
mov r4, #0x0000
mov r5, #0x0000
mov r6, #0x0000
mov r7, #0x0000
mov r8, #0x0000
mov r9, #0x0000
mov r10, #0x0000
mov r11, #0x0000
mov r12, #0x0000
mov r1, #0x11
msr cpsr, r1
msr spsr, r1
mov lr, r0
mov r8, #0x0000
banked in FIQ mode
mov r9, #0x0000
mov r10, #0x0000
mov r11, #0x0000
mov r12, #0x0000
mov r1, #0x13
msr cpsr, r1
msr spsr, r1
mov lr, r0
mov r1, #0x17
msr cpsr, r13
msr spsr, r13
mov lr, r0
mov r1, #0x12
msr cpsr, r13
msr spsr, r13
mov lr, r0
mov r1, #0x1B
msr cpsr, r13
msr spsr, r13
mov lr, r0
mov r1, #0xDF
msr cpsr, r13
msr spsr, r13
; FIQ Mode = 10001
; Registers R8 to R12 are also
; SVC Mode = 10011
; ABT Mode = 10111
; IRQ Mode = 10010
; UDEF Mode = 11011
; System Mode = 11011111
; Floating Point Co-Processor Initialization. FPU needs to be enabled first.
mrc
orr
mcr
mov
fmxr
p15,
r2,
p15,
r2,
fpexc,
#0x00,
r2,
#0x00,
#0x40000000
r2
r2,
c1, c0, #0x02
#0xF00000
r2,
c1, c0, #0x02
fmdrr d0, r1, r1
fmdrr d1, r1, r1
fmdrr d2, r1, r1
fmdrr d3, r1, r1
fmdrr d4, r1, r1
fmdrr d5, r1, r1
fmdrr d6, r1, r1
fmdrr d7, r1, r1
fmdrr d8, r1, r1
fmdrr d9, r1, r1
fmdrr d10, r1, r1
fmdrr d11, r1, r1
fmdrr d12, r1, r1
fmdrr d13, r1, r1
fmdrr d14, r1, r1
fmdrr d15, r1, r1
bl $+4
bl $+4
bl $+4
bl $+4
bx r0
.endasmfunc
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