TMS570LC4357 Datasheet, PDF (1/227 Pages) Texas Instruments – Hercules Microcontroller Based on the ARM® Cortex-R Core

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TMS570LC4357
SPNS195C – FEBRUARY 2014 – REVISED JUNE 2016
TMS570LC4357 Hercules™ Microcontroller Based on the ARM® Cortex®-R Core
1 Device Overview
1.1 Features
1
• High-Performance Automotive-Grade
Microcontroller for Safety-Critical Applications
– Dual-Core Lockstep CPUs With ECC-Protected
Caches
– ECC on Flash and RAM Interfaces
– Built-In Self-Test (BIST) for CPU, High-End
Timers, and On-Chip RAMs
– Error Signaling Module (ESM) With Error Pin
– Voltage and Clock Monitoring
• ARM^® Cortex^® - R5F 32-Bit RISC CPU
– 1.66 DMIPS/MHz With 8-Stage Pipeline
– FPU With Single- and Double-Precision
– 16-Region Memory Protection Unit (MPU)
– 32KB of Instruction and 32KB of Data Caches
With ECC
– Open Architecture With Third-Party Support
• Operating Conditions
– Up to 300-MHz CPU Clock
– Core Supply Voltage (VCC): 1.14 to 1.32 V
– I/O Supply Voltage (VCCIO): 3.0 to 3.6 V
• Integrated Memory
– 4MB of Program Flash With ECC
– 512KB of RAM With ECC
– 128KB of Data Flash for Emulated EEPROM
With ECC
• 16-Bit External Memory Interface (EMIF)
• Hercules™ Common Platform Architecture
– Consistent Memory Map Across Family
– Real-Time Interrupt (RTI) Timer (OS Timer)
– Two 128-Channel Vectored Interrupt Modules
(VIMs) With ECC Protection on Vector Table
• VIM1 and VIM2 in Safety Lockstep Mode
– Two 2-Channel Cyclic Redundancy Checker
(CRC) Modules
• Direct Memory Access (DMA) Controller
– 32 Channels and 48 Peripheral Requests
– ECC Protection for Control Packet RAM
– DMA Accesses Protected by Dedicated MPU
• Frequency-Modulated Phase-Locked Loop
(FMPLL) With Built-In Slip Detector
• Separate Nonmodulating PLL
• IEEE 1149.1 JTAG, Boundary Scan, and ARM
CoreSight™ Components
• Advanced JTAG Security Module (AJSM)
• Trace and Calibration Capabilities
– ETM™, RTP, DMM, POM
1
• Multiple Communication Interfaces
– 10/100 Mbps Ethernet MAC (EMAC)
• IEEE 802.3 Compliant (3.3-V I/O Only)
• Supports MII, RMII, and MDIO
– FlexRay Controller With 2 Channels
• 8KB of Message RAM With ECC Protection
• Dedicated FlexRay Transfer Unit (FTU)
– Four CAN Controller (DCAN) Modules
• 64 Mailboxes, Each With ECC Protection
• Compliant to CAN Protocol Version 2.0B
– Two Inter-Integrated Circuit (I²C) Modules
– Five Multibuffered Serial Peripheral Interface
(MibSPI) Modules
• MibSPI1: 256 Words With ECC Protection
• Other MibSPIs: 128 Words With ECC
Protection
– Four UART (SCI) Interfaces, Two With Local
Interconnect Network (LIN 2.1) Interface
Support
• Two Next Generation High-End Timer (N2HET)
Modules
– 32 Programmable Channels Each
– 256-Word Instruction RAM With Parity
– Hardware Angle Generator for Each N2HET
– Dedicated High-End Timer Transfer Unit (HTU)
for Each N2HET
• Two 12-Bit Multibuffered Analog-to-Digital
Converter (MibADC) Modules
– MibADC1: 32 Channels Plus Control for up to
1024 Off-Chip Channels
– MibADC2: 25 Channels
– 16 Shared Channels
– 64 Result Buffers Each With Parity Protection
• Enhanced Timing Peripherals
– 7 Enhanced Pulse Width Modulator (ePWM)
Modules
– 6 Enhanced Capture (eCAP) Modules
– 2 Enhanced Quadrature Encoder Pulse (eQEP)
Modules
• Three On-Die Temperature Sensors
• Up to 145 Pins Available for General-Purpose I/O
(GPIO)
• 16 Dedicated GPIO Pins With External Interrupt
Capability
• Packages
– 337-Ball Grid Array (ZWT) [Green]
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.