OMAP-L132 Datasheet, PDF (72/227 Pages) Texas Instruments – OMAP-L132 C6-Integra DSP+ARM Processor

OMAP-L132
SPRS762 – AUGUST 2011
www.ti.com
5.4.3 Reset Electrical Data Timings
Table 5-1 assumes testing over the recommended operating conditions.
Table 5-1. Reset Timing Requirements (⁽¹⁾, ⁽²⁾)
NO.
PARAMETER
1.2V
1.1V
1.0V
MIN MAX MIN MAX MIN MAX
UNIT
1 t_w(RSTL)
Pulse width, RESET/TRST low
2 t_su(BPV-RSTH)
Setup time, boot pins valid before RESET/TRST high
3 t_h(RSTH-BPV)
Hold time, boot pins valid after RESET/TRST high
4 ^{td(RSTH-RESETOUTH) RESET high to RESETOUT high; Warm reset}
RESET high to RESETOUT high; Power-on Reset
100
20
20
4096
6169
100
20
20
4096
6169
100
20
20
4096
6169
ns
ns
ns
cycles ⁽³⁾
5 t_{d(RSTL-RESETOUTL)} Delay time, RESET/TRST low to RESETOUT low
14
16
20
ns
(1) RESETOUT is multiplexed with other pin functions. See the Terminal Functions table, Table 2-5 for details.
(2) For power-on reset (POR), the reset timings in this table refer to RESET and TRST together. For warm reset, the reset timings in this
table refer to RESET only (TRST is held high).
(3) OSCIN cycles.
Power
Supplies
Ramping
OSCIN
Clock Source Stable
Power Supplies Stable
1
RESET
TRST
RESETOUT
Boot Pins
4
2
3
Config
Figure 5-4. Power-On Reset (RESET and TRST active) Timing
72
Peripheral Information and Electrical Specifications
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