MSC1200_06 Datasheet, PDF (72/92 Pages) Texas Instruments – Precision Analog-to-Digital Converter (ADC) and Current-Output Digital Converter (DAC)

MSC1200
MSC1201
MSC1202
SBAS317E − APRIL 2004 − REVISED MAY 2006
www.ti.com
ADC Control 2 (ADCON2)
SFR DEh
7
DR7
6
DR6
5
DR5
4
DR4
3
DR3
2
DR2
1
DR1
0
DR0
Reset Value
1Bh
DR7−0
bits 7−0
Decimation Ratio LSB (refer to ADCON3, SFR DFh).
ADC Control 3 (ADCON3)
7
6
5
4
3
2
1
SFR DFh
—
—
—
—
—
DR10
DR9
DR10−8
bits 2−0
Decimation Ratio Most Significant 3 Bits.
The
ADC
output
data
rate
is:
f_MOD
Decimation
Ratio
where
f_MOD
+
f_CLK
(ACLK)1)
@
64
.
0
DR8
Reset Value
06h
Accumulator (A or ACC)
SFR E0h
7
ACC.7
6
ACC.6
5
ACC.5
4
ACC.4
3
ACC.3
2
ACC.2
1
ACC.1
0
ACC.0
ACC.7−0 Accumulator. This register serves as the accumulator for arithmetic and logic operations.
bits 7−0
Reset Value
00h
72