TLC2933_13 Datasheet, PDF (7/24 Pages) Texas Instruments – HIGH-PERFORMANCE PHASE-LOCKED LOOP

TLC2933
HIGHĆPERFORMANCE PHASEĆLOCKED LOOP
SLAS136B − APRIL 1996 − REVISED JANUARY 2002
electrical characteristics over recommended operating free-air temperature range, V_DD = 5 V
(unless otherwise noted)
VCO section
PARAMETER
TEST CONDITIONS MIN TYP MAX UNIT
VOH
High-level output voltage
IOH = − 2 mA
4.5
V
VOL
Low-level output voltage
IOL = 2 mA
0.5 V
VIT ₊
Positive input threshold voltage at TEST, VCO INHIBIT
1.5 2.5 3.5 V
II
Input current at TEST, VCO INHIBIT
VI = VDD or ground
± 1 µA
Zi(VCO _IN) Input impedance at VCO IN
VCO IN = 1/2 VDD
10
MΩ
IDD(INH) VCO supply current (inhibit)
See Note 4
0.01
1 µA
IDD(VCO) VCO supply current
See Note 5
14
35 mA
NOTES: 4. The current into VCO VDD and LOGIC VDD when VCO INHIBIT = VDD, and PFD INHIBIT high.
5. The current into VCO VDD and LOGIC VDD when VCO IN = 1/2 VDD, RBIAS = 2.4 kΩ, VCO INHIBIT = ground, and PFD INHIBIT
high.
PFD section
PARAMETER
TEST CONDITIONS MIN TYP MAX UNIT
VOH
VOL
IOZ
High-level output voltage
Low-level output voltage
High-impedance-state output current
IOH = 2 mA
4.5
IOL = 2 mA
PFD INHIBIT = high,
VI = VDD or ground
V
0.2 V
± 1 µA
VIH
High-level input voltage at FIN−A, FIN−B
3.5
V
VIL
Low-level input voltage at FIN−A, FIN−B
1.5 V
VIT ₊
Positive input threshold voltage at PFD INHIBIT
1.5 2.5 3.5 V
Ci
Input capacitance at FIN−A, FIN−B
7
pF
Zi
Input impedance at FIN−A, FIN−B
10
MΩ
IDD(Z)
High-impedance-state PFD supply current
See Note 6
0.01
1 µA
IDD(PFD) PFD supply current
See Note 10
2.6
8 mA
NOTES: 6. The current into LOGIC VDD when FIN−A and FIN−B = ground, PFD INHIBIT = VDD, PFD OUT open, and VCO OUT is inhibited.
10. The current into LOGIC VDD when FIN−A and FIN−B = 50 MHz (VI(PP) = 3 V, rectangular wave), PFD INHIBIT = ground, PFD OUT
open, and VCO OUT is inhibited.
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