TLC2933_13 Datasheet, PDF (3/24 Pages) Texas Instruments – HIGH-PERFORMANCE PHASE-LOCKED LOOP

TLC2933
HIGHĆPERFORMANCE PHASEĆLOCKED LOOP
SLAS136B − APRIL 1996 − REVISED JANUARY 2002
VCO inhibit function
The VCO has an externally controlled inhibit function which inhibits the VCO output. A high level on the VCO
INHIBIT terminal stops the VCO oscillation and powers down the VCO. The output maintains a low level during
the power-down mode as shown in Table 1.
Table 1. VCO Inhibit Function
VCO INHIBIT
Low
High
VCO OSCILLATOR
Active
Stopped
VCO OUT
Active
Low level
IDD(VCO)
Normal
Power Down
PFD operation
The PFD is a high-speed, edge-triggered detector with an internal charge pump. The PFD detects the phase
difference between two frequency inputs supplied to FIN−A and FIN−B as shown in Figure 2. Nominally the
reference is supplied to FIN−A, and the frequency from the external counter output is fed to FIN−B. For clock
recovery PLL systems, other types of phase detectors should be used.
FIN− A
FIN− B
PFD OUT
VOH
Hi-Z
VOL
Figure 2. PFD Function Timing Chart
PFD inhibit control
A high level on the PFD INHIBIT terminal places PFD OUT in the high-impedance state and the PFD stops
phase detection as shown in Table 2. A high level on the PFD INHIBIT terminal can also be used as the
power-down mode for the PFD.
Table 2. VCO Output Control Function
PFD INHIBIT
Low
High
DETECTION
Active
Stopped
PFD OUT
Active
Hi-Z
IDD(PFD)
Normal
Power Down
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