THS1215_15 Datasheet, PDF (7/22 Pages) Texas Instruments – 3.3-V, 12-BIT, 15 MSPS, LOW-POWER ANALOG-TO-DIGITAL

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TIMING DIAGRAM
S1
Analog
1
CLK
D[9:0]
Not Recommended For New Designs
THS1215
SLAS292A – MARCH 2001 – REVISED MARCH 2004
PARAMETER MEASUREMENT INFORMATION
S2
S3
2
3
4
5
6
7
8
9
10
t _PIPELINE
t _d(O)
S1
S2
S3
Figure 1. Analog Input and Data Output Timing
OE
D[9:0]
Hi−Z
t _d(EN)
Data
Data
t _d(PZ)
Data
Hi−Z
Figure 2. Output Enable Timing
THS1215
1.5 V
BAND
GAP
REFT
CT
CTB
Figure 3. Reference Generation
REFB
CB
7