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THS1215_15 Datasheet, PDF (16/22 Pages) Texas Instruments – 3.3-V, 12-BIT, 15 MSPS, LOW-POWER ANALOG-TO-DIGITAL
THS1215
Not Recommended For New Designs
SLAS292A – MARCH 2001 – REVISED MARCH 2004
+3.3VD
+3.3VD
LNK3
OEB
R2
47K
OEB
LNK4
EXTREF
R23
47K
EXTREF
+3.3VD
+3.3VD
LNK2
CON1
R1
47K
CON1
R24
47K
CON0 CON0
LNK5
+3.3VD +3.3VA
24
27
14
13
ADCDB00
12
ADCDB01
11
ADCDB02
10
ADCDB03
9
ADCDB04
8
ADCDB05
7
ADCDB06
6
ADCDB07
5
ADCDB08
4
ADCDB09
3
ADCDB10
2
ADCDB11
1
DACCLK 28
DACCLK
25
15
U3
THS5671AIPW
AVDD
DVDD
D0
D1
D2
D3
D4
AGND
DGND
IOUT1
IOUT2
D5
D6
D7
EXTLO
D8
D9
REFIO
D10
FSADJ
D11
D12
D13
CLK
MODE
SLEEP
COMP1
COMP2
TP1
VRT
VRT
20
26
22 IOUT1 IOUT1
21 IOUT2 IOUT2
16
17
C16
C5
18
0.01uF
0.1uF
R10
2K
+3.3VA
C15
19
23
0.1uF
+3.3VA +3.3VD +3.3VA
U1
THS1215PW
8 AVDD AGND
7
20 DVDD DGND 19
27 CLKVDD AGND
1
ADCCLK
OEB
CON0
CON1
EXTREF
ADCCLK
OEB
CON0
CON1
EXTREF
28
CLK
26 OE
3 CON0
2 CON1
4 EXTREF
D0 25
D1 24
D2 23
D3 22
D4 21
D5 18
D6 17
VINP
VINM
VINP
VINM
5 AIN+
6 AIN−
D7 16
D8 15
D9 14
D10 13
9 REFT
D11 12
10 REFB OVRNG 11
TP2
C28
10uF
C27
VRB
VRB
0.1uF
C25
0.1uF
C26
0.1uF
_3.3VA
C62
470pF
C63
0.1uF
+3.3VA
C19
+
10uF
+3.3VD
C17
0.1uF
C18
0.1uF
ADCDB[00:11]
C6
0.1uF
ADCD00
ADCD01
ADCD02
ADCD03
ADCD04
ADCD05
ADCD06
ADCD07
ADCD08
ADCD09
ADCD10
ADCD11
ADCOVRNG
C64
470pF
C65
0.1uF
Figure 22. EVM Schematic
www.ti.com
ADCD [00:11]
+3.3VD
C66
470pF
C67
0.1uF
DEFINITIONS OF SPECIFICATIONS AND TERMINOLOGY
Integral Nonlinearity (INL)
Integral nonlinearity refers to the deviation of each individual code from a line drawn from zero through full scale.
The point used as zero occurs 1/2 LSB before the first code transition. The full-scale point is defined as level 1/2
LSB beyond the last code transition. The deviation is measured from the center of each particular code to the
true straight line between these two end-points.
Differential Nonlinearity (DNL)
An ideal ADC exhibits code transitions that are exactly 1 LSB apart. DNL is the deviation from this ideal value.
Therefore, this measure indicates how uniform the transfer function step sizes are. The ideal step size is defined
here as the step size for the device under test, i.e., (last transition level - first transition level)/(2n -2). Using this
definition for DNL separates the effects of gain and offset error. A minimum DNL better than -1 LSB ensures no
missing codes.
Offset and Gain Error
Offset error (in LSBs) is defined as the average offset for all inputs, and gain error is defined as the maximum
error (in LSBs) caused by the angular deviation from the offset corrected straight line.
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