LM3S1627 Datasheet, PDF (694/719 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Register Quick Reference
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30
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22
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20
19
18
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12
11
10
9
8
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5
4
3
2
1
0
DCGC0, type R/W, offset 0x120, reset 0x00000040 (see page 215)
PWM
ADC
WDT
RCGC1, type R/W, offset 0x104, reset 0x00000000 (see page 217)
TIMER3 TIMER2 TIMER1 TIMER0
I2C0
QEI0
SSI0
UART1 UART0
SCGC1, type R/W, offset 0x114, reset 0x00000000 (see page 219)
TIMER3 TIMER2 TIMER1 TIMER0
I2C0
QEI0
SSI0
UART1 UART0
DCGC1, type R/W, offset 0x124, reset 0x00000000 (see page 221)
TIMER3 TIMER2 TIMER1 TIMER0
I2C0
QEI0
SSI0
UART1 UART0
RCGC2, type R/W, offset 0x108, reset 0x00000000 (see page 223)
UDMA
SCGC2, type R/W, offset 0x118, reset 0x00000000 (see page 225)
GPIOE GPIOD GPIOC GPIOB GPIOA
UDMA
DCGC2, type R/W, offset 0x128, reset 0x00000000 (see page 227)
GPIOE GPIOD GPIOC GPIOB GPIOA
UDMA
SRCR0, type R/W, offset 0x040, reset 0x00000000 (see page 229)
SRCR1, type R/W, offset 0x044, reset 0x00000000 (see page 230)
I2C0
SRCR2, type R/W, offset 0x048, reset 0x00000000 (see page 231)
QEI0
GPIOE GPIOD GPIOC GPIOB GPIOA
PWM
WDT
ADC
SSI0
TIMER3 TIMER2 TIMER1 TIMER0
UART1 UART0
UDMA
Internal Memory
ROM Registers (System Control Offset)
Base 0x400F.E000
RMCTL, type R/W1C, offset 0x0F0, reset -
GPIOE GPIOD GPIOC GPIOB GPIOA
Internal Memory
Flash Memory Control Registers (Flash Control Offset)
Base 0x400F.D000
FMA, type R/W, offset 0x000, reset 0x0000.0000
FMD, type R/W, offset 0x004, reset 0x0000.0000
FMC, type R/W, offset 0x008, reset 0x0000.0000
FCRIS, type RO, offset 0x00C, reset 0x0000.0000
OFFSET
DATA
DATA
WRKEY
BA
OFFSET
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PRIS
ARIS
694
November 17, 2011
Texas Instruments-Production Data