LM3S1627 Datasheet, PDF (265/719 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Stellaris® LM3S1627 Microcontroller
Any unused memory in the control table may be used by the application. This includes the control
structures for any channels that are unused by the application as well as the unused control word
for each channel.
Table 7-3. Control Structure Memory Map
Offset
0x0
0x10
...
0x1F0
0x200
0x210
...
0x3F0
Channel
0, Primary
1, Primary
...
31, Primary
0, Alternate
1, Alternate
...
31, Alternate
Table 7-4 on page 265 shows an individual control structure entry in the control table. Each entry
has a source and destination end pointer. These pointers point to the ending address of the transfer
and are inclusive. If the source or destination is non-incrementing (as for a peripheral register), then
the pointer should point to the transfer address.
Table 7-4. Channel Control Structure
Offset
0x000
0x004
0x008
0x00C
Description
Source End Pointer
Destination End Pointer
Control Word
Unused
The remaining part of the control structure is the control word. The control word contains the following
fields:
■ Source and destination data sizes
■ Source and destination address increment size
■ Number of transfers before bus arbitration
■ Total number of items to transfer
■ Useburst flag
■ Transfer mode
The control word and each field are described in detail in “μDMA Channel Control
Structure” on page 282. The μDMA controller updates the transfer size and transfer mode fields as
the transfer is performed. At the end of a transfer, the transfer size will indicate 0, and the transfer
mode will indicate "stopped". Since the control word is modified by the μDMA controller, it must be
reconfigured before each new transfer. The source and destination end pointers are not modified
so they can be left unchanged if the source or destination addresses remain the same.
Prior to starting a transfer, a μDMA channel must be enabled by setting the appropriate bit in the
DMA Channel Enable Set ((DMAENASET) register. A channel can be disabled by setting the
November 17, 2011
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