LM3S1627 Datasheet, PDF (625/719 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Stellaris® LM3S1627 Microcontroller
Register 52: PWM0 Fault Pin Logic Sense (PWM0FLTSEN), offset 0x800
This register defines the PWM fault pin logic sense.
PWM0 Fault Pin Logic Sense (PWM0FLTSEN)
Base 0x4002.8000
Offset 0x800
Type R/W, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
FAULT0
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:1
0
Name
reserved
FAULT0
Type
RO
R/W
Reset
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Fault0 Sense
This bit specifies the sense of the FAULT0 input pin, and it determines
what sense is considered asserted, that is, the sense of the input (High
or Low) that indicates error.
Value Description
0 High
1 Low
The fault sense is used to translate the incoming FAULT0 pin
signal sense to an internal positive signal.
November 17, 2011
625
Texas Instruments-Production Data