ADS5263_15 Datasheet, PDF (67/84 Pages) Texas Instruments – Quad Channel 16-Bit, 100-MSPS High-SNR ADC

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Application Information (continued)
SYNC Input
Signal
ADC Input Clock
CLKP
ADC Sample Clock
Internal Signal
ADS5263
SLAS760D – MAY 2011 – REVISED NOVEMBER 2015
ADC Clamp Clock
Internal Signal
Data Sampled
by ADC
CLAMP ENABLED
Sample
CCD
RESET
CLAMP DISABLED CLAMP DISABLED
Sample
CCD
Reference
Sample
CCD
Picture
CLAMP ENABLED CLAMP DISABLED
Sample
CCD
RESET
Sample
CCD
Reference
External CCD
Signal
CCD Reset phase CCD Reference phase
CCD Picture phase
CCD Reset phase CCD Reference phase
Clamp Timing Diagram
CCD Picture phase
9.1.4 Low-Frequency Noise Suppression
The low-frequency noise suppression mode is specifically useful in applications where good noise performance is
desired in the low frequency band of dc to 1 MHz. By setting this mode, the low-frequency noise spectrum band
around dc is shifted to a similar band around (f_S/2 or Nyquist frequency). As a result, the noise spectrum from dc
to about 1 MHz improves significantly as shown by the following spectrum plots.
This function can be selectively enabled in each channel using the register bits <EN LFNS CH x>. The following
plots show the effect of this mode on the spectrum.
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