ADS5263_15 Datasheet, PDF (41/84 Pages) Texas Instruments – Quad Channel 16-Bit, 100-MSPS High-SNR ADC

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ADCLKp
PHASE_DDR<1:0> = 00
ADCLKp
ADS5263
SLAS760D – MAY 2011 – REVISED NOVEMBER 2015
PHASE_DDR<1:0> = 10
LCLKp
DATA
OUT
ADCLKp
PHASE_DDR<1:0> = 01
LCLKp
DATA
OUT
ADCLKp
PHASE_DDR<1:0> = 11
LCLKp
LCLKp
DATA
OUT
DATA
OUT
Figure 60. Programmable LCLK Phases
8.4 Device Functional Modes
8.4.1 Device Configuration
ADS5263 has several modes that can be configured using a serial programming interface, as described below.
In addition, the device has dedicated parallel pins for controlling common functions such as power down and
internal or external reference selection.
VOLTAGE APPLIED ON PDN
0V
Logic HIGH
Table 8. PDN CONTROL PIN
STATE OF REGISTER BIT
<CONFIG PDN pin>
X (don't care)
0
1
DESCRIPTION
Normal operation
Device enters global power-down mode
Device enters standby mode
VOLTAGE APPLIED ON INT/EXT
0V
Logic HIGH
Table 9. INT/EXT CONTROL PIN
DESCRIPTION
External reference mode. Apply voltage on VCM pin to set the references for ADC operation.
Internal reference
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