CC430F613 Datasheet, PDF (65/120 Pages) Texas Instruments – MSP430 SoC with RF Core

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ECCN 5E002 TSPA - Technology / Software Publicly Available
CC430F613x
CC430F612x
CC430F513x
SLAS554E – MAY 2009 – REVISED NOVEMBER 2010
12-Bit ADC, Power Supply and Input Range Conditions
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)⁽¹⁾
PARAMETER
TEST CONDITIONS
V_CC
MIN TYP
AV_CC
Analog supply voltage
Full performance
AV_CC and DV_CC are connected together,
AV_SS and DV_SS are connected together,
V_(AVSS) = V_(DVSS) = 0 V
2.2
V_(Ax)
Analog input voltage range⁽²⁾ All ADC12 analog input pins Ax
0
I_{ADC12_A}
Operating supply current into
AV_CC terminal⁽³⁾
f_ADC12CLK = 5.0 MHz, ADC12ON = 1,
REFON = 0, SHT0 = 0, SHT1 = 0,
ADC12DIV = 0
2.2 V
3V
125
150
MAX UNIT
3.6 V
AV_CC V
155
µA
220
C_I
Input capacitance
Only one terminal Ax can be selected at one
time
2.2 V
20
25 pF
R_I
Input MUX ON resistance
0 V ≤ V_Ax ≤ AV_CC
10 200 1900 Ω
(1) The leakage current is specified by the digital I/O input leakage.
(2) The analog input voltage range must be within the selected reference voltage range V_R+ to V_R– for valid conversion results. If the
reference voltage is supplied by an external source or if the internal reference voltage is used and REFOUT = 1, then decoupling
capacitors are required. See REF, External Reference and REF, Built-In Reference.
(3) The internal reference supply current is not included in current consumption parameter I_{ADC12_A}.
12-Bit ADC, Timing Parameters
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
f_ADC12CLK
TEST CONDITIONS
For specified performance of ADC12 linearity
parameters
V_CC
2.2 V/3 V
MIN TYP
0.45 4.8
f_ADC12OSC
Internal ADC12
oscillator ⁽¹⁾
ADC12DIV = 0, f_ADC12CLK = f_ADC12OSC
2.2 V/3 V
4.2 4.8
t_CONVERT Conversion time
REFON = 0, Internal oscillator,
f_ADC12OSC = 4.2 MHz to 5.4 MHz
2.2 V/3 V
2.4
External f_ADC12CLK from ACLK, MCLK or SMCLK,
(2)
ADC12SSEL ≠ 0
t_Sample
Sampling time
R_S = 400 Ω, R_I = 1000 Ω, C_I = 30 pF,
t = [R_S + R_I] × C_I ⁽³⁾
2.2 V/3 V 1000
(1) The ADC12OSC is sourced directly from MODOSC inside the UCS.
(2) 13 × ADC12DIV × 1/f_ADC12CLK
(3) Approximately ten Tau (t) are needed to get an error of less than ±0.5 LSB:
t_Sample = ln(2ⁿ⁺¹) x (R_S + R_I) × C_I + 800 ns, where n = ADC resolution = 12, R_S = external source resistance
MAX UNIT
5.4 MHz
5.4 MHz
3.1
µs
ns
12-Bit ADC, Linearity Parameters
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
V_CC
MIN TYP
E_I
Integral
linearity error (INL)
1.4 V ≤ (V_eREF+ – V_REF–/V_eREF–)min ≤ 1.6 V
1.6 V < (V_eREF+ – V_REF–/V_eREF–)min ≤ V_AVCC
2.2 V/3 V
E_D
Differential
(V_eREF+ – V_REF–/V_eREF–)min ≤ (V_eREF+ – V_REF–/V_eREF–),
linearity error (DNL) C_VREF+ = 20 pF
2.2 V/3 V
E_O
Offset error
(V_eREF+ – V_REF–/V_eREF–)min ≤ (V_eREF+ – V_REF–/V_eREF–),
Internal impedance of source R_S < 100 Ω, C_VREF+ = 20 pF
2.2 V/3 V
±1.0
E_G
Gain error
(V_eREF+ – V_REF–/V_eREF–)min ≤ (V_eREF+ – V_REF–/V_eREF–),
C_VREF+ = 20 pF
2.2 V/3 V
±1.0
E_T
Total unadjusted
error
(V_eREF+ – V_REF–/V_eREF–)min ≤ (V_eREF+ – V_REF–/V_eREF–),
C_VREF+ = 20 pF
2.2 V/3 V
±1.4
MAX
±2
±1.7
UNIT
LSB
±1.0 LSB
±2.0 LSB
±2.0 LSB
±3.5 LSB
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